-
公开(公告)号：US20240013471A1
公开(公告)日：2024-01-11
申请号：US18471651
申请日：2023-09-21
Applicant: NVIDIA CORPORATION
Inventor： Samuli LAINE , Timo AILA , Tero KARRAS , Gregory MUTHLER , William P. NEWHALL, JR. , Ronald C. BABICH, JR. , Craig KOLB , Ignacio LLAMAS , John BURGESS
CPC classification number: G06T15/06 , G06T15/005 , G06T17/005
Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
-
公开(公告)号：US20250104332A1
公开(公告)日：2025-03-27
申请号：US18971672
申请日：2024-12-06
Applicant: NVIDIA CORPORATION
Inventor： Samuli LAINE , Timo AILA , Tero KARRAS , Gregory MUTHLER , William P. NEWHALL, JR. , Ronald C BABICH, JR. , Craig KOLB , Ignacio LLAMAS , John BURGESS
Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
-
公开(公告)号：US20250004947A1
公开(公告)日：2025-01-02
申请号：US18882707
申请日：2024-09-11
Applicant: NVIDIA Corporation
Inventor： Gregory A. MUTHLER , Timo AILA , Tero KARRAS , Samuli LAINE , William Parsons NEWHALL, JR. , Ronald Charles BABICH, JR. , John BURGESS , Ignacio LLAMAS
IPC: G06F12/0875 , G06F16/901 , G06T15/06
Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
-
4.发明申请FULLY PARALLEL CONSTRUCTION OF K-D TREES, OCTREES, AND QUADTREES IN A GRAPHICS PROCESSING UNIT 有权在图形处理单元中完全并行构建K-D TREES，OCTREES和QUADTREES公开(公告)号：US20130235050A1
公开(公告)日：2013-09-12
申请号：US13791738
申请日：2013-03-08
Applicant: NVIDIA CORPORATION
Inventor： Tero KARRAS
IPC: G06T1/20
CPC classification number: G06T1/20 , G06T17/005 , G06T2210/52
Abstract: A non-transitory computer-readable storage medium having computer-executable instructions for causing a computer system to perform a method for constructing k-d trees, octrees, and quadtrees from radix trees is disclosed. The method includes assigning a Morton code for each of a plurality of primitives corresponding to leaf nodes of a binary radix tree, and sorting the plurality of Morton codes. The method includes building a radix tree requiring at most a linear amount of temporary storage with respect to the leaf nodes, wherein an internal node is built in parallel with one or more of its ancestor nodes. The method includes, partitioning the plurality of Morton codes for each node of the radix tree into categories based on a corresponding highest differing bit to build a k-d tree. A number of octree or quadtree nodes is determined for each node of the k-d tree. A total number of nodes in the octree or quadtree is determined, allocated and output.
Abstract translation: 公开了一种具有计算机可执行指令的非瞬时计算机可读存储介质，用于使计算机系统执行从基数树构建k-d树，八叉树和四叉树的方法。 该方法包括为对应于二进制基树的叶节点的多个图元中的每一个分配Morton码，以及对多个Morton码进行排序。 该方法包括构建一个基数树，其对于叶节点至多需要一定量的临时存储，其中内部节点与其祖先节点中的一个或多个并行构建。 该方法包括：基于相应的最高不同位将基数的每个节点的多个Morton码划分为类别以构建k-d树。 为k-d树的每个节点确定了一些八叉树或四叉树节点。 确定，分配和输出八叉树或四叉树中的总数。
-
公开(公告)号：US20240355039A1
公开(公告)日：2024-10-24
申请号：US18761820
申请日：2024-07-02
Applicant: NVIDIA Corporation
Inventor： Samuli LAINE , Tero KARRAS , Timo AILA , Robert OHANNESSIAN , William Parsons NEWHALL, Jr. , Greg MUTHLER , Ian KWONG , Peter NELSON , John BURGESS
CPC classification number: G06T15/06 , G06T15/005
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
-
Patent Agency Ranking
公开(公告)号：US20220027280A1
公开(公告)日：2022-01-27
申请号：US17483133
申请日：2021-09-23
Applicant: NVIDIA Corporation
Inventor： Greg MUTHLER , Timo AILA , Tero KARRAS , Samuli LAINE , William Parsons NEWHALL, JR. , Ronald Charles BABICH, JR. , John BURGESS , Ignacio LLAMAS
IPC: G06F12/0875 , G06T15/06 , G06F16/901
Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
-
公开(公告)号：US20220020202A1
公开(公告)日：2022-01-20
申请号：US17490024
申请日：2021-09-30
Applicant: NVIDIA Corporation
Inventor： Samuli LAINE , Tero KARRAS , Greg MUTHLER , William Parsons NEWHALL , Ronald Charles BABICH , Ignacio LLAMAS , John BURGESS
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.
-
公开(公告)号：US20200051316A1
公开(公告)日：2020-02-13
申请号：US16101196
申请日：2018-08-10
Applicant: NVIDIA Corporation
Inventor： Samuli LAINE , Tero KARRAS , Greg MUTHLER , William Parsons NEWHALL, JR. , Ronald Charles BABICH , Ignacio LLAMAS , John BURGESS
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.
-
公开(公告)号：US20240211255A1
公开(公告)日：2024-06-27
申请号：US18596106
申请日：2024-03-05
Applicant: NVIDIA Corporation
Inventor： Ronald Charles BABICH, JR. , John BURGESS , Jack CHOQUETTE , Tero KARRAS , Samuli LAINE , Ignacio LLAMAS , Gregory MUTHLER , William Parsons NEWHALL, JR.
CPC classification number: G06F9/3004 , G06F9/3877 , G06F9/4843 , G06F15/163 , G06T1/20 , G06T1/60 , G06T2200/28
Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.
-
10.发明公开公开(公告)号：US20230237729A1
公开(公告)日：2023-07-27
申请号：US18129334
申请日：2023-03-31
Applicant: NVIDIA Corporation
Inventor： Greg MUTHLER , Tero KARRAS , Samuli LAINE , William Parsons NEWHALL, JR. , Ronald Charles BABICH, JR. , John BURGESS , Ignacio LLAMAS
IPC: G06T15/06
CPC classification number: G06T15/06
Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
-
-
-
-
-
-
-
-
-
Search Results
16
records
(took 0.018 seconds)
