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公开(公告)号：US11018684B1
公开(公告)日：2021-05-25
申请号：US17005076
申请日：2020-08-27
Applicant: NXP B.V.
Inventor： Sushil Kumar Gupta , Pankaj Agrawal , Ashish Panpalia
Abstract: A pipeline analog-to-digital converter (ADC) includes a hybrid multiplying digital-to-analog converter (MDAC) that includes multiple digital-to-analog converters (DACs), at least one conversion circuit, and at least one amplifier such that a number of conversion circuits and a number of amplifiers is less than a number of DACs. Each DAC is configured to receive an analog input signal in non-overlapping durations of a clock signal and generate a corresponding analog output signal. At least one of the conversion circuits is coupled with at least two DACs, and each conversion circuit is configured to perform conversion operation on a corresponding analog output signal to generate digital signals. At least one of the amplifiers is coupled with at least two DACs, and each amplifier is configured to perform amplification operation on a corresponding analog output signal.
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公开(公告)号：US11018682B1
公开(公告)日：2021-05-25
申请号：US16886474
申请日：2020-05-28
Applicant: NXP B.V.
Inventor： Sushil Kumar Gupta , Pankaj Agrawal , Ashish Panpalia
Abstract: A sub-ranging analog-to-digital converter (ADC) includes a coarse ADC and a fine ADC that receives a set of coarse signals from the coarse ADC. The fine ADC includes multiple digital-to-analog converters (DACs) and multiple converters such that a number of converters is less than a number of DACs. The DACs and the converters function in a partial time-interleaved manner where each DAC receives an analog input signal in different non-overlapping durations of a clock signal and generates a corresponding analog output signal. At least one of the converters is coupled with at least two DACs, and each converter is configured to receive the corresponding analog output signals and perform conversion operation to generate digital signals in non-overlapping durations of the clock signal, respectively. The durations for performing conversion operation of at least two of the converters overlap partially.
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Patent Agency Ranking
公开(公告)号：US10826511B1
公开(公告)日：2020-11-03
申请号：US16785495
申请日：2020-02-07
Applicant: NXP B.V.
Inventor： Sushil Kumar Gupta , Pankaj Agrawal , Ashish Panpalia
Abstract: A pipeline analog-to-digital converter (ADC) includes a hybrid multiplying digital-to-analog converter (MDAC) that includes multiple digital-to-analog converters (DACs), an amplifier, and a conversion circuit. The multiple DACs function in a pipelined manner such that each DAC receives an analog input signal in different cycles of a clock signal and generates a corresponding analog output signal. The amplifier amplifies each analog output signal to generate a corresponding amplified analog signal in different cycles of the clock signal. The conversion circuit successively approximates each analog output signal to generate multiple digital signals. Thus, a digital output signal of the pipeline ADC is generated based on the corresponding amplified analog signal and at least one of the multiple digital signals. The pipeline ADC utilizes one cycle for performing each of sampling, conversion, and amplification operations, which results into low power consumption by the pipeline ADC.
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公开(公告)号：US20160380534A1
公开(公告)日：2016-12-29
申请号：US15180238
申请日：2016-06-13
Applicant: NXP B.V.
Inventor： Jitendra Prabhakar Harshey , Ramesh Karpur , Pankaj Agrawal
CPC classification number: H02M3/157 , H02M1/08 , H02M3/158 , H02M2001/0006 , H02M2001/0009 , H02M2001/0032 , Y02B70/16
Abstract: A buck converter is described having a buck converter output for outputting an output supply voltage; a first power supply domain operably coupled to a power source; a second power supply domain; a power supply controller coupled to the first power supply domain, the second power supply domain and the buck converter output; wherein the power supply controller is configured to supply power to the second power supply domain from the first power supply domain or the buck converter output, in dependence of the buck converter output supply voltage. Changing the current supplied to the second power supply domain to the buck converter output may reduce the quiescent current consumption from a battery power source, prolonging battery life.
Abstract translation: 描述具有用于输出输出电源电压的降压转换器输出的降压转换器; 可操作地耦合到电源的第一电源域; 第二电源领域; 耦合到第一电源域的电源控制器，第二电源域和降压转换器输出; 其中所述电源控制器被配置为根据所述降压转换器输出电源电压从所述第一电源域或所述降压转换器输出向所述第二电源域供电。 将提供给第二电源域的电流更改为降压转换器输出可能会降低电池电源的静态电流消耗，延长电池寿命。
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公开(公告)号：US20220413532A1
公开(公告)日：2022-12-29
申请号：US17304636
申请日：2021-06-23
Applicant: NXP B.V.
Inventor： Sushil Kumar Gupta , Pankaj Agrawal
IPC: G05F1/575
Abstract: A low dropout regulator includes a proportional-to-absolute-temperature (PTAT) circuit, an amplification circuit, and an output circuit. The PTAT circuit outputs one current, and the amplification circuit outputs one or more currents. The one or more currents are outputted by the amplification circuit based on collector-emitter voltages associated with transistors of the PTAT circuit. Alternatively, the one or more currents are outputted by the amplification circuit based on the current outputted by the PTAT circuit and the collector-emitter voltages associated with the transistors of the PTAT circuit. The output circuit generates one or more output voltages based on at least one of a base-emitter voltage associated with a transistor of the PTAT circuit and a current of the one or more currents outputted by the amplification circuit.
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公开(公告)号：US09837897B2
公开(公告)日：2017-12-05
申请号：US15180238
申请日：2016-06-13
Applicant: NXP B.V.
Inventor： Jitendra Prabhakar Harshey , Ramesh Karpur , Pankaj Agrawal
CPC classification number: H02M3/157 , H02M1/08 , H02M3/158 , H02M2001/0006 , H02M2001/0009 , H02M2001/0032 , Y02B70/16
Abstract: A buck converter is described having a buck converter output for outputting an output supply voltage; a first power supply domain operably coupled to a power source; a second power supply domain; a power supply controller coupled to the first power supply domain, the second power supply domain and the buck converter output; wherein the power supply controller is configured to supply power to the second power supply domain from the first power supply domain or the buck converter output, in dependence of the buck converter output supply voltage. Changing the current supplied to the second power supply domain to the buck converter output may reduce the quiescent current consumption from a battery power source, prolonging battery life.
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公开(公告)号：US11669116B2
公开(公告)日：2023-06-06
申请号：US17304636
申请日：2021-06-23
Applicant: NXP B.V.
Inventor： Sushil Kumar Gupta , Pankaj Agrawal
IPC: G05F1/575
CPC classification number: G05F1/575
Abstract: A low dropout regulator includes a proportional-to-absolute-temperature (PTAT) circuit, an amplification circuit, and an output circuit. The PTAT circuit outputs one current, and the amplification circuit outputs one or more currents. The one or more currents are outputted by the amplification circuit based on collector-emitter voltages associated with transistors of the PTAT circuit. Alternatively, the one or more currents are outputted by the amplification circuit based on the current outputted by the PTAT circuit and the collector-emitter voltages associated with the transistors of the PTAT circuit. The output circuit generates one or more output voltages based on at least one of a base-emitter voltage associated with a transistor of the PTAT circuit and a current of the one or more currents outputted by the amplification circuit.
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