公开(公告)号：US20200219867A1

公开(公告)日：2020-07-09

申请号：US16239801

申请日：2019-01-04

Applicant: NXP B.V.

Inventor： Marcin Grad ,  Paul H. Cappon ,  Taede Smedes

IPC: H01L27/02 ,  H04L25/02

Abstract: An integrated “pull-down” driver circuit (210) is formed with a combination device consisting of an output driver transistor (N1) electrically coupled between a current source circuit (Ns) and the conductive pad, and an ESD bypass transistor (N3) electrically coupled in series with the output driver transistor, where one or more conductive interconnect layers connect the ESD bypass transistor in parallel with the current source circuit so that the ESD bypass transistor is in an off-state during normal operation and is activated to form a parasitic bipolar junction transistor with the output driver transistor to conduct ESD current between a first power supply conductor and the conductive pad during ESD events, and where a complementary integrated “pull-up” driver circuit may be formed with three corresponding PMOS transistors (P1, PS, P3) connected as shown between a second power supply conductor and the conductive pad.

公开(公告)号：US10141301B2

公开(公告)日：2018-11-27

申请号：US15237324

申请日：2016-08-15

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Taede Smedes

IPC: H01L27/02 ,  H02H9/04

Abstract: Semiconductor devices with cross-domain electrostatic discharge (ESD) protection and related fabrication methods are provided. An exemplary semiconductor device includes first domain circuitry, second domain circuitry, and an interface coupled between an output node of the first domain driver circuitry and second domain receiver circuitry. The receiver circuitry includes a transistor having a gate electrode coupled to the interface, with a body electrode of the transistor being coupled to protection circuitry of the first domain circuitry. The body electrode is effectively biased to a reference voltage node of the first domain by the protection circuitry in response to an ESD event to protect the gate oxide of the transistor from a potentially damaging ESD voltage.

公开(公告)号：US20150342098A1

公开(公告)日：2015-11-26

申请号：US14282581

申请日：2014-05-20

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Taede Smedes

IPC: H05K9/00

CPC classification number: H05K9/0067 ,  H01L23/60 ,  H01L27/0255 ,  H01L27/0266 ,  H01L2924/0002 ,  H02H9/046 ,  H03K19/00346 ,  H05K1/0259 ,  H01L2924/00

Abstract: Embodiments of a method for providing electrostatic discharge (ESD) protection for an Input/Output (I/O) device, an ESD protection device for an I/O device, and an I/O device are described. In one embodiment, a method for providing ESD protection for an I/O device involves activating a switch device to turn off the I/O device during an ESD event and deactivating the switch device to turn on the I/O device in the absence of an ESD event. Other embodiments are also described.

Abstract translation: 描述了用于为输入/输出（I / O）设备提供静电放电（ESD）保护的方法，用于I / O设备的ESD保护设备和I / O设备的实施例。 在一个实施例中，用于为I / O设备提供ESD保护的方法包括在ESD事件期间激活开关设备以关闭I / O设备，并且在不存在I / O设备的情况下停用该开关设备以接通I / O设备 ESD事件。 还描述了其它实施例。

公开(公告)号：US11251782B1

公开(公告)日：2022-02-15

申请号：US17094284

申请日：2020-11-10

Applicant: NXP B.V.

Inventor： Marcin Grad ,  Paul Hendrik Cappon ,  Kiran B. Gopal ,  Taede Smedes

IPC: H03K3/356 ,  H01L27/02 ,  H03K19/0185

Abstract: As disclosed herein, a level shift circuit includes devices that are responsive to an ESD signal for placing those devices in a specific condition in response to the ESD signal indicating an ESD event. In some embodiments, the devices are transistors in current paths that are placed in a condition such that during an ESD event, voltage differentials in the current paths across voltage domain boundaries do not damage the circuitry of the level shift circuit. In some embodiments, some of the same devices that are responsive to the ESD event are also responsive to a signal to that detects the absence of a power supply voltage of one of the domains and places those devices in a condition to disable the level shift circuit if the power supply voltage is not present.

公开(公告)号：US10892258B2

公开(公告)日：2021-01-12

申请号：US16239801

申请日：2019-01-04

Applicant: NXP B.V.

Inventor： Marcin Grad ,  Paul H. Cappon ,  Taede Smedes

IPC: H01L27/02 ,  H04L25/02

Abstract: An integrated “pull-down” driver circuit (210) is formed with a combination device consisting of an output driver transistor (N1) electrically coupled between a current source circuit (Ns) and the conductive pad, and an ESD bypass transistor (N3) electrically coupled in series with the output driver transistor, where one or more conductive interconnect layers connect the ESD bypass transistor in parallel with the current source circuit so that the ESD bypass transistor is in an off-state during normal operation and is activated to form a parasitic bipolar junction transistor with the output driver transistor to conduct ESD current between a first power supply conductor and the conductive pad during ESD events, and where a complementary integrated “pull-up” driver circuit may be formed with three corresponding PMOS transistors (P1, PS, P3) connected as shown between a second power supply conductor and the conductive pad.

公开(公告)号：US09545041B2

公开(公告)日：2017-01-10

申请号：US14282581

申请日：2014-05-20

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Taede Smedes

IPC: H02H3/22 ,  H05K9/00 ,  H03K19/003 ,  H05K1/02 ,  H01L27/02 ,  H02H9/04 ,  H01L23/60

CPC classification number: H05K9/0067 ,  H01L23/60 ,  H01L27/0255 ,  H01L27/0266 ,  H01L2924/0002 ,  H02H9/046 ,  H03K19/00346 ,  H05K1/0259 ,  H01L2924/00

Abstract: Embodiments of a method for providing electrostatic discharge (ESD) protection for an Input/Output (I/O) device, an ESD protection device for an I/O device, and an I/O device are described. In one embodiment, a method for providing ESD protection for an I/O device involves activating a switch device to turn off the I/O device during an ESD event and deactivating the switch device to turn on the I/O device in the absence of an ESD event. Other embodiments are also described.

Abstract translation: 描述了用于为输入/输出（I / O）设备提供静电放电（ESD）保护的方法，用于I / O设备的ESD保护设备和I / O设备的实施例。 在一个实施例中，用于为I / O设备提供ESD保护的方法包括在ESD事件期间激活开关设备以关闭I / O设备，并且在不存在I / O设备的情况下停用该开关设备以接通I / O设备 ESD事件。 还描述了其它实施例。