公开(公告)号：US10600776B2

公开(公告)日：2020-03-24

申请号：US15441566

申请日：2017-02-24

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Wei-Jhih Tseng

IPC: H02H9/00 ,  H01L27/02 ,  H02H9/04

Abstract: Embodiments of an electrostatic discharge (ESD) protection device and a method for operating an ESD protection device are described. In one embodiment, an ESD protection device includes a first bipolar device connected to a first node, a second bipolar device connected to the first bipolar device and to a second node, and a metal-oxide-semiconductor (MOS) device connected to the first and second nodes and to the first and second bipolar devices and configured to shunt current in response to an ESD pulse received between the first and second nodes. The first bipolar device, the second bipolar device, and the MOS device are formed on a deep well structure. Other embodiments are also described.

公开(公告)号：US10366974B2

公开(公告)日：2019-07-30

申请号：US15595068

申请日：2017-05-15

Applicant: NXP B.V.

Inventor： Gijs Jan de Raad ,  Da-Wei Lai

IPC: H01L27/02 ,  H05K9/00 ,  H02H9/04 ,  H01L29/78

Abstract: Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, an ESD protection device includes a bipolar transistor device connected between a first node and a second node, a series protection device connected in series with the bipolar transistor device, and a diode device connected between the second node and a third node. A drain terminal of an NMOS device to be protected is connectable to the first node. A body of the NMOS device to be protected is connectable to the second node. A source terminal of the NMOS device to be protected is connectable to the third node. The diode device and the bipolar transistor device are configured to form a parasitic silicon controlled rectifier. Other embodiments are also described.

公开(公告)号：US10141301B2

公开(公告)日：2018-11-27

申请号：US15237324

申请日：2016-08-15

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Taede Smedes

IPC: H01L27/02 ,  H02H9/04

Abstract: Semiconductor devices with cross-domain electrostatic discharge (ESD) protection and related fabrication methods are provided. An exemplary semiconductor device includes first domain circuitry, second domain circuitry, and an interface coupled between an output node of the first domain driver circuitry and second domain receiver circuitry. The receiver circuitry includes a transistor having a gate electrode coupled to the interface, with a body electrode of the transistor being coupled to protection circuitry of the first domain circuitry. The body electrode is effectively biased to a reference voltage node of the first domain by the protection circuitry in response to an ESD event to protect the gate oxide of the transistor from a potentially damaging ESD voltage.

公开(公告)号：US09704850B2

公开(公告)日：2017-07-11

申请号：US15177858

申请日：2016-06-09

Applicant: NXP B.V.

Inventor： Guido Wouter Willem Quax ,  Da-Wei Lai

IPC: H01L27/02 ,  H01L29/87 ,  H01L23/528 ,  H01L29/06

CPC classification number: H01L27/0262 ,  H01L23/5286 ,  H01L29/0684 ,  H01L29/0692 ,  H01L29/87

Abstract: An electrostatic discharge protection device including a silicon controlled rectifier. In one example, the silicon controlled rectifier includes a first n-type region located in a semiconductor substrate. The silicon controlled rectifier also includes a first p-type region located adjacent the first n-type region in the semiconductor substrate. The silicon controlled rectifier further includes an n-type contact region and a p-type contact region located in the first n-type region. The silicon controlled rectifier also includes an n-type contact region and a p-type contact region located in the first p-type region. The silicon controlled rectifier further includes a blocking region having a higher resistivity than the first p-type region. The blocking region is located between the n-type contact region and the p-type contact region in the first p-type region for reducing a trigger voltage of the silicon controlled rectifier.

公开(公告)号：US20190198493A1

公开(公告)日：2019-06-27

申请号：US15851534

申请日：2017-12-21

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Wei-Jhih Tseng

IPC: H01L27/02

CPC classification number: H01L27/0262 ,  H01L27/027 ,  H02H9/046

Abstract: Embodiments of an ESD protection device and a method for operating an ESD protection device are described. In one embodiment, an ESD protection device includes a first bipolar device connected to a first node, a second bipolar device connected to the first bipolar device and to a second node, a metal-oxide-semiconductor (MOS) device connected to the first and second nodes and to the first and second bipolar devices and configured to shunt current in response to an ESD pulse received between the first and second nodes, and a diode device connected to the first node, to a third node, to the first and second bipolar devices, and to the MOS device. Other embodiments are also described.

公开(公告)号：US10211290B2

公开(公告)日：2019-02-19

申请号：US15066086

申请日：2016-03-10

Applicant: NXP B.V.

Inventor： Da-Wei Lai

IPC: H01L27/02 ,  H01L27/10 ,  H01L29/08 ,  H01L29/10

Abstract: A bipolar junction transistor is configured to provide electrostatic discharge (ESD) protection for an integrated circuit. The bipolar junction transistor includes a substrate configured to function as a gate for the bipolar junction transistor. At least one drain finger extends in a first direction on a first surface of the substrate and is configured to function as a collector for the bipolar junction transistor. At least one source finger extends in the first direction on the first surface of the substrate and is configured to function as an emitter for the bipolar junction transistor. The at least one source finger includes a pickup region that is configured to set a substrate potential.

公开(公告)号：US20180331090A1

公开(公告)日：2018-11-15

申请号：US15595068

申请日：2017-05-15

Applicant: NXP B.V.

Inventor： Gijs Jan de Raad ,  Da-Wei Lai

IPC: H01L27/02 ,  H05K9/00 ,  H02H9/04 ,  H01L29/78

CPC classification number: H01L27/0248 ,  H01L27/0251 ,  H01L27/0259 ,  H01L27/0262 ,  H01L29/7833 ,  H02H9/046 ,  H05K9/0067

Abstract: Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, an ESD protection device includes a bipolar transistor device connected between a first node and a second node, a series protection device connected in series with the bipolar transistor device, and a diode device connected between the second node and a third node. A drain terminal of an NMOS device to be protected is connectable to the first node. A body of the NMOS device to be protected is connectable to the second node. A source terminal of the NMOS device to be protected is connectable to the third node. The diode device and the bipolar transistor device are configured to form a parasitic silicon controlled rectifier. Other embodiments are also described.

公开(公告)号：US20180286855A1

公开(公告)日：2018-10-04

申请号：US15471259

申请日：2017-03-28

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Wei-Jhih Tseng

IPC: H01L27/02 ,  H02H9/04

CPC classification number: H01L27/0277 ,  H01L27/0259 ,  H01L27/0262 ,  H01L27/0266 ,  H01L27/027 ,  H01L27/0292 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/0847 ,  H01L29/1004 ,  H01L29/1095 ,  H01L29/783 ,  H02H9/046

Abstract: Embodiments of an electrostatic discharge (ESD) protection device and a method for operating an ESD protection device are described. In one embodiment, an ESD protection device includes stacked first and second PNP bipolar transistors that are configured to shunt current between a first node and a second node in response to an ESD pulse received between the first and second nodes and an NMOS transistor connected in series with the stacked first and second PNP bipolar transistors and the second node. An emitter and a base of the second PNP bipolar transistor are connected to a collector of the first PNP bipolar transistor. A gate terminal of the NMOS transistor is connected to a source terminal of the NMOS transistor. Other embodiments are also described.

公开(公告)号：US09973000B2

公开(公告)日：2018-05-15

申请号：US15172208

申请日：2016-06-03

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Guido Wouter Willem Quax ,  Gijs Jan De Raad

IPC: H02H3/22 ,  H02H9/04 ,  H01L27/02

CPC classification number: H02H9/046 ,  H01L27/0255 ,  H01L27/0262 ,  H01L27/0266 ,  H01L27/0285

Abstract: An electrostatic discharge power rail clamp circuit and an integrated circuit including the same. The power rail clamp circuit includes a first power rail, a second power rail and a first node. The circuit further includes an n-channel field effect transistor having a source and drain located in an isolated p-well in a semiconductor substrate. The drain is connected to the first power rail. The source and isolated p-well are connected to the first node. The circuit also includes a capacitor connected between the first node and the second power rail. The circuit further includes a resistor connected between the first power rail and the first node. The circuit also includes an inverter for controlling the gate of the field effect transistor, wherein the inverter has an input connected to the first node. The circuit further a silicon controlled rectifier connected between the first node and the second power rail.

公开(公告)号：US20150342098A1

公开(公告)日：2015-11-26

申请号：US14282581

申请日：2014-05-20

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Taede Smedes

IPC: H05K9/00

CPC classification number: H05K9/0067 ,  H01L23/60 ,  H01L27/0255 ,  H01L27/0266 ,  H01L2924/0002 ,  H02H9/046 ,  H03K19/00346 ,  H05K1/0259 ,  H01L2924/00

Abstract: Embodiments of a method for providing electrostatic discharge (ESD) protection for an Input/Output (I/O) device, an ESD protection device for an I/O device, and an I/O device are described. In one embodiment, a method for providing ESD protection for an I/O device involves activating a switch device to turn off the I/O device during an ESD event and deactivating the switch device to turn on the I/O device in the absence of an ESD event. Other embodiments are also described.

Abstract translation: 描述了用于为输入/输出（I / O）设备提供静电放电（ESD）保护的方法，用于I / O设备的ESD保护设备和I / O设备的实施例。 在一个实施例中，用于为I / O设备提供ESD保护的方法包括在ESD事件期间激活开关设备以关闭I / O设备，并且在不存在I / O设备的情况下停用该开关设备以接通I / O设备 ESD事件。 还描述了其它实施例。