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公开(公告)号：US11894769B2
公开(公告)日：2024-02-06
申请号：US17364756
申请日：2021-06-30
申请人： NXP USA, Inc.
CPC分类号： H02M3/155 , H02M1/0058 , H02M1/42 , H02M1/4225 , H02M3/1584 , H02M3/1586
摘要： A method and apparatus are described for controlling the phase of an interleaved boost converter using cycle ring time. In an embodiment, a cycle controller generates a first drive signal to control switching of a first converter and a second drive signal to control switching of a second converter, the controller receives a first cycle signal from the first converter and a second cycle signal from the second converter, wherein the first cycle signal and the second cycle signal have a power phase time and a ringing phase time. The cycle controller determines a master ringing phase time of the first cycle signal and applies the master ringing phase time to the second cycle signal to determine a slave ringing phase time. The cycle controller generates the second drive signal in accordance with the slave ringing phase time.
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公开(公告)号：US20230069460A1
公开(公告)日：2023-03-02
申请号：US17412223
申请日：2021-08-25
申请人： NXP USA, Inc.
摘要： A method and apparatus are described for compensating input voltage ripples of an interleaved boost converter using cycle times. In an embodiment, a phase compensator receives a first duty cycle measurement of a first converter and a second duty cycle measurement of a second converter, compares the first duty cycle to the second duty cycle and generates a phase compensation in response thereto. A phase combiner combines a phase adjustment output and the phase compensation and produces a phase control output, and a cycle controller is coupled to the first and the second converters to generate a first drive signal to control switching of the first converter and to generate a second drive signal to control switching of the second converter, wherein a time of the second drive signal is adjusted using the phase control output.
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公开(公告)号：US11870349B2
公开(公告)日：2024-01-09
申请号：US17412223
申请日：2021-08-25
申请人： NXP USA, Inc.
CPC分类号： H02M3/1586 , G01R29/023 , H02M1/0043 , H02M1/14 , H02M1/4216
摘要： A method and apparatus are described for compensating input voltage ripples of an interleaved boost converter using cycle times. In an embodiment, a phase compensator receives a first duty cycle measurement of a first converter and a second duty cycle measurement of a second converter, compares the first duty cycle to the second duty cycle and generates a phase compensation in response thereto. A phase combiner combines a phase adjustment output and the phase compensation and produces a phase control output, and a cycle controller is coupled to the first and the second converters to generate a first drive signal to control switching of the first converter and to generate a second drive signal to control switching of the second converter, wherein a time of the second drive signal is adjusted using the phase control output.
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公开(公告)号：US11632045B2
公开(公告)日：2023-04-18
申请号：US17198884
申请日：2021-03-11
申请人： NXP USA, Inc.
摘要： Various embodiments relate to a current loop controller configured to control a boost converter, including: an amplifier configured to scale a measured current; a subtractor configured to subtract the scaled measured current from a desired current and to output an error signal; a controller including an integral part and a proportional part configured to produce a control signal based upon the difference signal and a gain value, wherein the gain value is based upon a measured value tps, wherein tps is the on-time plus the secondary time of the boost converter; and a switch signal generator configured to produce a gate signal based upon the control signal, wherein the gate signal controls the boost converter.
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公开(公告)号：US11581804B1
公开(公告)日：2023-02-14
申请号：US17403947
申请日：2021-08-17
申请人： NXP USA, Inc.
摘要： Various embodiments relate to a converter controller configured to control a resonant converter, including: an integrator configured to receive a current measurement signal from a current measurement circuit in the resonant converter and to produce a capacitor voltage signal indicative of the voltage at the resonant capacitor; a control logic configured to produce a high side driver signal, a low side driver signal, a symmetry error signal based upon the capacitor voltage signal and the current measurement signal; and a symmetry controller configured to produce a symmetry correction signal based upon the symmetry error signal, wherein the symmetry error signal is input into the integrator to control the duty cycle of the high side driver signal and the low side driver signal, wherein the high side driver signal and the low side driver signal control the operation of the resonant converter.
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公开(公告)号：US11444540B1
公开(公告)日：2022-09-13
申请号：US17381161
申请日：2021-07-20
申请人： NXP USA, Inc.
摘要： A method and apparatus are described for controlling the gain of a phase loop of an interleaved boost converter using cycle signals. In an embodiment, a phase compensator compares a duration of the power phase of a converter to a cycle duration for the converter to generate a phase compensation. A phase adjustment module receives phase feedback signals of the first and second converters, measures the phase difference, receives the phase compensation, and generates a phase control output in response. A cycle controller receives the phase control output and generates first and second drive signals to control switching of first and second gates of the respective converters, wherein times of the first and second drive signals are adjusted using the phase control output.
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7.发明授权公开(公告)号：US11557960B1
公开(公告)日：2023-01-17
申请号：US17491244
申请日：2021-09-30
申请人： NXP USA, Inc.
摘要： Adaptive enabling and disabling is described for valley switching in a power factor correction boost converter. In one example, a boost converter control system includes an amplitude detector to receive an amplitude signal from a boost converter that is related to ringing of the boost converter output. The amplitude detector determines the ringing amplitude. A valley switching controller compares the ringing amplitude to a first high amplitude threshold when valley switching is enabled and generates a valley switching disable signal if the ringing amplitude is below the first high amplitude threshold. A cycle controller coupled to the boost converter generates a drive signal to control switching of the boost converter and coupled to the valley switching controller receives the valley switching disable signal to generate the drive signal without valley switching in response to the valley switching disable signal.
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公开(公告)号：US20230006551A1
公开(公告)日：2023-01-05
申请号：US17364756
申请日：2021-06-30
申请人： NXP USA, Inc.
摘要： A method and apparatus are described for controlling the phase of an interleaved boost converter using cycle ring time. In an embodiment, a cycle controller generates a first drive signal to control switching of a first converter and a second drive signal to control switching of a second converter, the controller receives a first cycle signal from the first converter and a second cycle signal from the second converter, wherein the first cycle signal and the second cycle signal have a power phase time and a ringing phase time. The cycle controller determines a master ringing phase time of the first cycle signal and applies the master ringing phase time to the second cycle signal to determine a slave ringing phase time. The cycle controller generates the second drive signal in accordance with the slave ringing phase time.
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公开(公告)号：US11909309B2
公开(公告)日：2024-02-20
申请号：US17478500
申请日：2021-09-17
申请人： NXP USA, Inc.
CPC分类号： H02M1/4225 , H02M1/0009 , H02M1/08 , H02M1/32
摘要： Stable switching is disclosed for a power factor correction boost converter using an input voltage and an output voltage. In one example, a boost converter control system includes a gate driver coupled to a switch of a boost converter to generate a drive signal to control switching of the switch, wherein a period of the drive signal is adjusted using a current adjustment signal. A current control loop is coupled to the gate driver to receive a sensed input current from the boost converter and a desired input current and to generate the current adjustment signal to the gate driver. A current limiter is coupled to the gate driver and the current control loop to determine a duty cycle of the switch, to determine a maximum input current in response to the duty cycle, and to restrict the desired input current to below the maximum input current.
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公开(公告)号：US11626794B2
公开(公告)日：2023-04-11
申请号：US17204603
申请日：2021-03-17
申请人： NXP USA, Inc.
摘要： Various embodiments relate to a current loop controller configured to control a boost converter, including: an amplifier configured to scale a measured current; a subtractor configured to subtract the scaled measured current from a desired current and to output an error signal; a controller including an integral part and a proportional part configured to produce a control signal based upon the error signal; a measuring circuit configured to measure the actual switching period of the boost converter; and a switch signal generator configured to produce a switching signal based upon the control signal and the measured actual switching period, wherein the switch signal controls the boost converter.
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