公开(公告)号：US06795890B1

公开(公告)日：2004-09-21

申请号：US09640454

申请日：2000-08-17

申请人： Naoto Sugai ,  Atsushi Settsu ,  Saburo Kobayashi

发明人： Naoto Sugai ,  Atsushi Settsu ,  Saburo Kobayashi

IPC分类号： G06F1300

CPC分类号： G11C16/105 ,  G11C16/102

摘要： A data processing device includes flash memory; nonvolatile memory having an erasure block buffer in which there are stored data recorded in an erasure-unit region of the flash memory; a write control controller for writing into the erasure block buffer write request data, which are to be written into the flash memory; a save unit for saving non-changing data stored in the flash memory to the erasure block buffer; an erasure instruction unit for instructing erasure of the data from the flash memory; and a write unit for writing the data recorded in the erasure block buffer to the flash memory.

摘要翻译： 数据处理装置包括闪存; 具有擦除块缓冲器的非易失性存储器，其中存储有记录在闪速存储器的擦除单元区域中的数据; 写入控制器，用于写入擦除块缓冲器写入请求数据，写入到闪存中; 保存单元，用于将存储在闪存中的不变数据保存到擦除块缓冲器; 擦除指令单元，用于指示擦除来自闪速存储器的数据; 以及写入单元，用于将记录在擦除块缓冲器中的数据写入闪速存储器。

公开(公告)号：US06571312B1

公开(公告)日：2003-05-27

申请号：US09504713

申请日：2000-02-16

申请人： Naoto Sugai ,  Atsushi Settsu ,  Saburo Kobayashi

发明人： Naoto Sugai ,  Atsushi Settsu ,  Saburo Kobayashi

IPC分类号： G06F1300

CPC分类号： G11C16/16

摘要： A data processing device includes flash memory 101; nonvolatile memory 102 having an erasure block buffer 103 in which there are stored data recorded in an erasure-unit region of the flash memory 101; a write controller 111 for writing into the erasure block buffer 103 write request data which are to be written into the flash memory 101; a save unit 112 for saving non-changing data stored in the flash memory 101 to the erasure block buffer 103; an erasure instruction unit 301 for instructing erasure of the data from the erasure-unit region of flash memory 101; and a write unit for writing the data recorded in the erasure block buffer 103 to the flash memory 101. A comparison may be made between the erasure unit regions into which first and second write data are to be written. The data processing device may further include a write buffer for storing write data.

摘要翻译： 数据处理装置包括闪存101; 具有擦除块缓冲器103的非易失性存储器102，其中存储有记录在闪速存储器101的擦除单元区域中的数据; 写入控制器111，用于写入擦除块缓冲器103写入要写入闪存101的请求数据; 保存单元112，用于将存储在闪速存储器101中的不变数据保存到擦除块缓冲器103; 用于指示擦除来自闪存101的擦除单元区域的数据的擦除指令单元301; 以及用于将记录在擦除块缓冲器103中的数据写入闪速存储器101的写入单元。可以在要写入第一和第二写入数据的擦除单元区域之间进行比较。 数据处理装置还可以包括用于存储写入数据的写入缓冲器。

公开(公告)号：US06374353B1

公开(公告)日：2002-04-16

申请号：US09261255

申请日：1999-03-03

申请人： Atsushi Settsu ,  Noriyuki Baba ,  Naoto Sugai

发明人： Atsushi Settsu ,  Noriyuki Baba ,  Naoto Sugai

IPC分类号： G06F9445

CPC分类号： G06F9/4406

摘要： A method of booting up an information processing apparatus is provided. An operating system is divided into a mini operating system (OS) module having a function of bootstrap and an OS main body module having functions other than the function of bootstrap. The mini OS module can be located in a boot block of a boot device, whereas the OS main body module can be located in a file system of the boot device. A firmware or F/W code module stored in a ROM loads the mini OS module into memory when booting up the information processing apparatus. The mini OS module then loads the OS main body module into memory and then initializes the OS main body module.

摘要翻译： 提供了引导信息处理装置的方法。 操作系统被分为具有引导功能的微型操作系统（OS）模块和具有除引导功能之外的功能的OS主体模块。 mini OS模块可以位于引导设备的引导块中，而OS主体模块可以位于引导设备的文件系统中。 存储在ROM中的固件或F / W代码模块在启动信息处理设备时将mini OS模块加载到存储器中。 然后，微型操作系统模块将OS主体模块加载到存储器中，然后初始化OS主体模块。

公开(公告)号：US09959225B2

公开(公告)日：2018-05-01

申请号：US14650630

申请日：2013-01-31

申请人： Toshiro Tokunaga ,  Atsushi Settsu

发明人： Toshiro Tokunaga ,  Atsushi Settsu

IPC分类号： G06F13/24 ,  G06F9/445 ,  G06F9/48 ,  G06F17/30

CPC分类号： G06F13/24 ,  G06F9/44505 ,  G06F9/4812

摘要： At start-up of a computer apparatus, a CPU executes a first initialization procedure included in a RAS module to initialize resources to be used by the RAS module. After execution of the first initialization procedure, the CPU executes an initialization procedure included in an OS to initialize resources to be used by the OS. After execution of the initialization procedure, the CPU executes a second initialization procedure included in the RAS module to copy an interrupt determining part included in the OS to the RAS module, and to set the interrupt detection unit such that upon detecting an interrupt the interrupt detection unit calls an interrupt determining part copied to the RAS module, instead of the interrupt determining part in the OS.

公开(公告)号：US20130111264A1

公开(公告)日：2013-05-02

申请号：US13808754

申请日：2010-07-06

申请人： Atsushi Settsu

发明人： Atsushi Settsu

IPC分类号： G06F11/16

CPC分类号： G06F11/165 ,  G06F11/0724 ,  G06F11/0778 ,  G06F11/0787 ,  G06F11/202

摘要： When an error occurs while a memory dump performing unit of a processor core is storing in an HDD device data of a memory device which is a shared memory, a memory dump error detection unit detects a memory dump error. A core coordination unit notifies the memory dump error to a core coordination unit of a processor core. Upon being notified by the core coordination unit of the memory dump error in the memory dump performing unit, a memory dump performing unit of the processor core stores in the HDD device the data of the memory device in place of the memory dump performing unit.

摘要翻译： 当处理器核心的存储器转储执行单元存储在作为共享存储器的存储器件的HDD设备数据中发生错误时，存储器转储错误检测单元检测存储器转储错误。 核心协调单元将内存转储错误通知给处理器核心的核心协调单元。 在核心协调单元通知存储器转储执行单元中的存储器转储错误时，处理器核心的存储器转储执行单元在HDD设备中存储存储器件的数据来代替存储器转储执行单元。

公开(公告)号：US08583960B2

公开(公告)日：2013-11-12

申请号：US13808754

申请日：2010-07-06

申请人： Atsushi Settsu

发明人： Atsushi Settsu

IPC分类号： G06F11/00

CPC分类号： G06F11/165 ,  G06F11/0724 ,  G06F11/0778 ,  G06F11/0787 ,  G06F11/202

摘要： When an error occurs while a memory dump performing unit of a processor core is storing in an HDD device data of a memory device which is a shared memory, a memory dump error detection unit detects a memory dump error. A core coordination unit notifies the memory dump error to a core coordination unit of a processor core. Upon being notified by the core coordination unit of the memory dump error in the memory dump performing unit, a memory dump performing unit of the processor core stores in the HDD device the data of the memory device in place of the memory dump performing unit.

摘要翻译： 当处理器核心的存储器转储执行单元存储在作为共享存储器的存储器件的HDD设备数据中发生错误时，存储器转储错误检测单元检测存储器转储错误。 核心协调单元将内存转储错误通知给处理器核心的核心协调单元。 在核心协调单元通知存储器转储执行单元中的存储器转储错误时，处理器核心的存储器转储执行单元在HDD设备中存储存储器件的数据来代替存储器转储执行单元。