公开(公告)号：US11855635B2

公开(公告)日：2023-12-26

申请号：US17853740

申请日：2022-06-29

Applicant: Navitas Semiconductor Limited

Inventor： Hongwei Jia ,  Santosh Sharma ,  Daniel M. Kinzer ,  Victor Sinow ,  Matthew Anthony Topp

IPC: H03K3/012

CPC classification number: H03K3/012

Abstract: Circuits and methods that control a rate of change of a drain voltage as a function of time in a transistor are disclosed. In one aspect, the circuit includes a transistor having a gate terminal that controls operation of the transistor, and a control circuit coupled to the gate terminal and arranged to change a voltage at the gate terminal at a first rate of voltage with respect to time from a first voltage to a first intermediate voltage, and further arranged to change the voltage at the gate terminal at a second rate of voltage with respect to time from the first intermediate voltage to a second intermediate voltage, where the first rate is different than the second rate.

公开(公告)号：US20230006657A1

公开(公告)日：2023-01-05

申请号：US17853740

申请日：2022-06-29

Applicant: Navitas Semiconductor Limited

Inventor： Hongwei Jia ,  Santosh Sharma ,  Daniel M. Kinzer ,  Victor Sinow ,  Matthew Anthony Topp

IPC: H03K3/012

Abstract: Circuits and methods that control a rate of change of a drain voltage as a function of time in a transistor are disclosed. In one aspect, the circuit includes a transistor having a gate terminal that controls operation of the transistor, and a control circuit coupled to the gate terminal and arranged to change a voltage at the gate terminal at a first rate of voltage with respect to time from a first voltage to a first intermediate voltage, and further arranged to change the voltage at the gate terminal at a second rate of voltage with respect to time from the first intermediate voltage to a second intermediate voltage, where the first rate is different than the second rate.