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公开(公告)号：US20060014363A1
公开(公告)日：2006-01-19
申请号：US11233318
申请日：2005-09-21
CPC分类号： H01L21/76254
摘要： A method for forming a structure that includes a layer that is removed from a donor wafer that has a first layer made of a semiconductor material containing germanium. The method includes the steps of forming a weakness zone in the thickness of the first layer; bonding the donor wafer to a host wafer; and supplying energy so as to weaken the donor wafer at the level of the zone of weakness. The zone of weakness is formed by subjecting the donor wafer to a co-implantation of at least two different atomic species, while the bonding is carried out by performing a thermal treatment at a temperature between 300° C. and 400° C. for a duration of from 30 minutes to four hours.
摘要翻译： 一种用于形成结构的方法，该结构包括从具有由含锗的半导体材料制成的第一层的施主晶片上去除的层。 该方法包括以下步骤：在第一层的厚度上形成弱区; 将施主晶片键合到主晶片; 并提供能量以便在弱化区的水平上削弱施主晶片。 弱化区通过使施主晶片经受至少两种不同原子物质的共同注入而形成，而通过在300℃和400℃之间的温度下进行热处理来进行接合， 持续时间为30分钟至4小时。
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公开(公告)号：US07449394B2
公开(公告)日：2008-11-11
申请号：US11179713
申请日：2005-07-11
IPC分类号： H01L21/46
CPC分类号： H01L21/76254
摘要： Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer; bonding the free surface of the second layer to a host wafer; and supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer. Advantageously, the donor wafer includes a SiGe layer, and the co-implantation of atomic species is conducted according to implantation parameters adapted to enable a first species to form the zone of weakness in the SiGe layer, and to enable a second species to provide a concentration peak located beneath the zone of weakness in the donor wafer to thus minimize surface roughness resulting from detachment at the zone of weakness.
摘要翻译： 描述形成半导体结构的方法。 在一个实施例中，该技术包括提供在第一层上具有第一半导体层和第二半导体层并具有自由表面的施主晶片; 通过第二层的自由表面共同植入两种不同的原子物质，以形成第一层中的弱区; 将第二层的自由表面粘合到主晶片; 并且在弱化区域提供能量以分散包含主晶片，第二层和第一层的一部分的半导体结构。 有利地，施主晶片包括SiGe层，并且根据适于使第一种类形成SiGe层中的弱点区域的植入参数来进行原子物质的共同注入，并且使得第二物质能够提供 浓度峰位于供体晶片中的弱点之下，从而使得在弱化区分离导致的表面粗糙度最小化。
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公开(公告)号：US20050245049A1
公开(公告)日：2005-11-03
申请号：US11179713
申请日：2005-07-11
IPC分类号： H01L21/762 , H01L21/30 , H01L21/46
CPC分类号： H01L21/76254
摘要： Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer; bonding the free surface of the second layer to a host wafer; and supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer. Advantageously, the donor wafer includes a SiGe layer, and the co-implantation of atomic species is conducted according to implantation parameters adapted to enable a first species to form the zone of weakness in the SiGe layer, and to enable a second species to provide a concentration peak located beneath the zone of weakness in the donor wafer to thus minimize surface roughness resulting from detachment at the zone of weakness.
摘要翻译： 描述形成半导体结构的方法。 在一个实施例中，该技术包括提供在第一层上具有第一半导体层和第二半导体层并具有自由表面的施主晶片; 通过第二层的自由表面共同植入两种不同的原子物质，以形成第一层中的弱区; 将第二层的自由表面粘合到主晶片; 并且在弱化区域提供能量以分散包含主晶片，第二层和第一层的一部分的半导体结构。 有利地，施主晶片包括SiGe层，并且根据适于使第一种类形成SiGe层中的弱点区域的植入参数来进行原子物质的共同注入，并且使得第二物质能够提供 浓度峰位于供体晶片中的弱点之下，从而使得在弱化区分离导致的表面粗糙度最小化。
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公开(公告)号：US20050196937A1
公开(公告)日：2005-09-08
申请号：US11059122
申请日：2005-02-16
IPC分类号： H01L21/762 , H01L21/336 , H01L21/46
CPC分类号： H01L21/76254
摘要： Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface, implanting atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer, and bonding the free surface of the second layer to a host wafer. The method also includes supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer, conducting a bond strengthening step on the structure after detachment at a temperature of less than about 800° C. to improve the strength of the bond between the second layer and the host wafer, and selectively etching the first layer portion to remove it from the structure and to expose a surface of the second layer. The implanting step includes implantation parameters chosen to minimize surface roughness resulting from detachment at the zone of weakness.
摘要翻译： 描述形成半导体结构的方法。 在一个实施例中，该技术包括提供在第一层上具有第一半导体层和第二半导体层的施主晶片，并且具有自由表面，通过第二层的自由表面注入原子物质以形成弱区的区域 第一层，并将第二层的自由表面结合到主晶片。 该方法还包括提供能量以在弱化区域分离包括主晶片，第二层和第一层的一部分的半导体结构，在小于约800℃的温度下分离后在结构上进行结合强化步骤 以提高第二层和主晶片之间的结合强度，并且选择性地蚀刻第一层部分以将其从结构上除去并暴露第二层的表面。 植入步骤包括选择的植入参数以最小化由于在弱化区域脱离而导致的表面粗糙度。
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公开(公告)号：US07276428B2
公开(公告)日：2007-10-02
申请号：US11059122
申请日：2005-02-16
CPC分类号： H01L21/76254
摘要： Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface, implanting atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer, and bonding the free surface of the second layer to a host wafer. The method also includes supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer, conducting a bond strengthening step on the structure after detachment at a temperature of less than about 800° C. to improve the strength of the bond between the second layer and the host wafer, and selectively etching the first layer portion to remove it from the structure and to expose a surface of the second layer. The implanting step includes implantation parameters chosen to minimize surface roughness resulting from detachment at the zone of weakness.
摘要翻译： 描述形成半导体结构的方法。 在一个实施例中，该技术包括提供在第一层上具有第一半导体层和第二半导体层的施主晶片，并且具有自由表面，通过第二层的自由表面注入原子物质以形成弱区的区域 第一层，并将第二层的自由表面结合到主晶片。 该方法还包括提供能量以在弱化区域分离包括主晶片，第二层和第一层的一部分的半导体结构，在小于约800℃的温度下分离后在结构上进行结合强化步骤 以提高第二层和主晶片之间的结合强度，并且选择性地蚀刻第一层部分以将其从结构上除去并暴露第二层的表面。 植入步骤包括选择的植入参数以最小化由于在弱化区域脱离而导致的表面粗糙度。
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公开(公告)号：US20080014712A1
公开(公告)日：2008-01-17
申请号：US11624070
申请日：2007-01-17
IPC分类号： H01L21/30
CPC分类号： H01L21/187
摘要： The invention provides methods of direct bonding substrates at least one of which includes a layer of semiconductor material that extends over its front face or in the proximity thereof. The provided methods include, prior to bonding, subjecting the bonding face of at least one substrate comprising a semiconductor material to selected heat treatment at a selected temperature and in a selected gaseous atmosphere. The bonded substrates are useful for electronic, optic, or optoelectronic applications.
摘要翻译： 本发明提供了直接接合基底的方法，其中至少一个包括在其前表面或其附近延伸的半导体材料层。 所提供的方法包括，在接合之前，使包含半导体材料的至少一个衬底的结合面在所选择的温度和选定的气体气氛中进行选择的热处理。 键合的衬底可用于电子，光学或光电子应用。
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公开(公告)号：US07670929B2
公开(公告)日：2010-03-02
申请号：US11624070
申请日：2007-01-17
申请人： Konstantin Bourdelle , Carlos Mazure , Olivier Rayssac , Pierre Rayssac, legal representative , Giséle Rayssac, legal representative
IPC分类号： H01L21/30
CPC分类号： H01L21/187
摘要： The invention provides methods of direct bonding substrates at least one of which includes a layer of semiconductor material that extends over its front face or in the proximity thereof. The provided methods include, prior to bonding, subjecting the bonding face of at least one substrate comprising a semiconductor material to selected heat treatment at a selected temperature and in a selected gaseous atmosphere. The bonded substrates are useful for electronic, optic, or optoelectronic applications.
摘要翻译： 本发明提供了直接接合基底的方法，其中至少一个包括在其前表面或其附近延伸的半导体材料层。 所提供的方法包括，在接合之前，使包含半导体材料的至少一个衬底的结合面在所选择的温度和选定的气体气氛中进行选择的热处理。 键合的衬底可用于电子，光学或光电子应用。
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公开(公告)号：US20080014714A1
公开(公告)日：2008-01-17
申请号：US11832431
申请日：2007-08-01
IPC分类号： H01L21/30
CPC分类号： H01L21/187
摘要： A method of fabricating a hybrid substrate by direct bonding of donor and receiver substrates where each substrate has a respective front face and surface, with the front face of the receiver substrate having a semiconductor material near the surface, and the donor substrate including a zone of weakness that defines a layer to be transferred. The method includes preparing the substrate surfaces by exposing the surface of the receiver substrate to a temperature from about 900° C. to about 1200° C. in an inert atmosphere for at least 30 sec; directly bonding together the front faces of the prepared substrates to form a composite substrate; heat treating the composite substrate to increase bonding strength between the front surfaces of the donor and receiver substrates; and transferring the layer from the donor substrate by detaching the remainder of the donor substrate at the zone of weakness.
摘要翻译： 一种制造混合基板的方法，所述方法通过施主和接收器基板的直接接合，其中每个基板具有相应的正面和表面，其中所述接收器基板的前表面具有靠近所述表面的半导体材料，所述施主基板包括： 定义要转移的层的弱点。 该方法包括通过在惰性气氛中将接收器基底的表面暴露于约900℃至约1200℃的温度至少30秒来制备基底表面; 将所制备的基板的正面直接接合在一起以形成复合基板; 对复合基板进行热处理以增加供体和接收器基板的前表面之间的结合强度; 以及通过在弱化区域分离供体基质的剩余部分而从施主衬底转移层。
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公开(公告)号：US08012289B2
公开(公告)日：2011-09-06
申请号：US12392888
申请日：2009-02-25
申请人： Olivier Rayssac , Pierre Rayssac, legal representative , Gisèle Rayssac, legal representative , Takeshi Akatsu
发明人： Olivier Rayssac , Takeshi Akatsu
IPC分类号： B44C1/17 , B29C37/02 , B29C35/02 , B32B37/06 , B32B37/02 , B32B38/18 , H01L21/322 , H01L21/324 , H01L21/304 , B44C1/22 , B32B37/16 , B32B38/08 , B32B38/10 , H01L21/42
CPC分类号： H01L21/76254 , H01L21/76259 , Y10S117/915
摘要： The invention relates to a method of fabricating a release substrate produced from semiconductor materials, the method comprising creating a reversible connection between two substrate release layers characterized in that the reversible connection is formed by a connecting layer produced using a first material as the basis, the connecting layer further comprising a nanoparticle concentrating zone of a second material disposed to facilitate release of the substrate, the first and second materials being selected to maintain the bonding energy of the reversible connection substantially constant even when the substrate is exposed to heat treatment.
摘要翻译： 本发明涉及一种制造由半导体材料制成的剥离衬底的方法，该方法包括在两个衬底释放层之间产生可逆连接，其特征在于可逆连接由以第一材料为基础的连接层形成， 连接层还包括设置成便于释放衬底的第二材料的纳米颗粒聚集区，选择第一和第二材料以便即使当衬底暴露于热处理时，也可以维持可逆连接的结合能基本恒定。
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公开(公告)号：US20110233733A1
公开(公告)日：2011-09-29
申请号：US13151358
申请日：2011-06-02
CPC分类号： H01L21/76254 , H01L21/76259 , Y10S117/915
摘要： The invention relates to a release substrate produced from semiconductor materials, and which includes a first substrate release layer having a surface in contact with a connecting layer, and a second substrate release layer having a surface in contact with the connecting layer opposite the first substrate release layer so that the connecting layer is located between the first substrate release layer and second substrate release layer; and a concentrated zone of solid nanoparticles located within the connecting layer to maintain the bonding energy of the reversible connection substantially constant even when the substrate is exposed to heat treatment while also facilitating breaking of the connecting layer by mechanical action.
摘要翻译： 本发明涉及由半导体材料制成的剥离基板，其包括具有与连接层接触的表面的第一基板剥离层和具有与连接层相对的表面与第一基板释放相反的第二基板剥离层 使得连接层位于第一基板剥离层和第二基板剥离层之间; 以及位于连接层内的固体纳米颗粒的集中区域，以便即使当衬底暴露于热处理同时还有助于通过机械作用破坏连接层时，可逆连接的结合能基本上保持不变。
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