摘要:
A streaming processor circuit of a processing system is automatically generated by selecting a set of circuit parameters consistent with a set of circuit constraints and generating a representation of a candidate streaming processor circuit based upon the set of circuit parameters to execute one or more iterations of a computation specified by a streaming data flow graph. The candidate streaming processor circuit is evaluated with respect to one or more quality metrics and the representation of the candidate streaming processor circuit is output if the candidate streaming processor circuit satisfies a set of processing system constraints and is better in at least one of the one or more quality metrics than other candidate streaming processor circuits.
摘要:
A streaming data interface device (700) of a streaming processing system (200) is automatically generated by selecting a set of circuit parameters (610) consistent with a set of circuit constraints and generating (612, 614) a representation of a candidate memory interface device based upon a set of stream descriptors. The candidate streaming data interface device is evaluated (616) with respect to one or more quality metrics and the representation of the candidate streaming processor circuit is output (622) if the candidate memory interface device satisfies a set of processing system constraints and is better in at least one of the one or more quality metrics than other candidate memory interface devices.
摘要:
In one embodiment, a subset of a set of streaming kernels of an application is selected for implementation on a reconfigurable processor. The streaming kernels are selected by first forming a stream flow graph of the application by parsing a program of instructions of the application, the stream flow graph having kernel nodes and edges, and determining benefit and cost values for each kernel node in the stream flow graph. Next, a subset of the kernel nodes that maximizes a weighted sum of the benefits values is selected, subject to a constraint that the sum of cost values is not greater than a prescribed value for the reconfigurable processor.
摘要:
A specification of a configurable processor is generated by generating (1) specifications of first and second stream memory interfaces to be operable to access data in accordance with first and second stream descriptors, and (2) a specification of an interim data storage device (buffer) to be accessed by the first and second stream memory interfaces and to be operable to receive data from a first computational module via the first stream memory interface and to transfer data to a second computational module via the second stream memory interface. The specifications are output and may be used to configure a configurable processor.
摘要:
A specification of a configurable processor is generated by generating (1) specifications of first and second stream memory interfaces to be operable to access data in accordance with first and second stream descriptors, and (2) a specification of an interim data storage device (buffer) to be accessed by the first and second stream memory interfaces and to be operable to receive data from a first computational module via the first stream memory interface and to transfer data to a second computational module via the second stream memory interface. The specifications are output and may be used to configure a configurable processor.
摘要:
A method and system for automatic configuration of processor hardware from an application program that has stream descriptor definitions, descriptive of memory access locations, data access thread definitions having a stream descriptor and a data channel source or sink as parameters, and computation thread definitions having a function pointer, a data channel source and a data channel sink as parameters. The application program is compiled to produce a description of the data flow between the threads as specified in the application program. The hardware is configured to have streaming memory interface devices operable to access a memory in accordance with the stream descriptor definitions, data path devices operable to process data in accordance with the computation thread definitions and data channels operable to connect the data path devices and streaming memory interface devices in accordance with the description of the data flow.
摘要:
A streaming data interface device (700) of a streaming processing system (200) is automatically generated by selecting a set of circuit parameters (610) consistent with a set of circuit constraints and generating (612, 614) a representation of a candidate memory interface device based upon a set of stream descriptors. The candidate streaming data interface device is evaluated (616) with respect to one or more quality metrics and the representation of the candidate streaming processor circuit is output (622) if the candidate memory interface device satisfies a set of processing system constraints and is better in at least one of the one or more quality metrics than other candidate memory interface devices
摘要:
A visual reality augmentation apparatus (300) comprises one or more (substantially) real time reality context input stages (301, 302) that provide corresponding reality context information to a reality content detector (303). The latter provides detected object information to an augmented reality content display (304) that provides augmentation information (via, for example, projection display techniques) to augment the real world scene being viewed by a viewer. In a preferred approach a direction-of-gaze detector (305) detects the viewer's gaze direction. That information then serves to facilitate positional synchronization of the augmentation information to the viewer's point of view of the corresponding real world information.
摘要:
A streaming processor circuit of a processing system is automatically generated by selecting a set of circuit parameters consistent with a set of circuit constraints and generating a representation of a candidate streaming processor circuit based upon the set of circuit parameters to execute one or more iterations of a computation specified by a streaming data flow graph. The candidate streaming processor circuit is evaluated with respect to one or more quality metrics and the representation of the candidate streaming processor circuit is output if the candidate streaming processor circuit satisfies a set of processing system constraints and is better in at least one of the one or more quality metrics than other candidate streaming processor circuits.
摘要:
A system and method is provided for processing a digital image. The system and method processes image data by replacing bad pixel data in the digital image. Specifically, the system and method replaces bad pixel data in the image data by comparing each pixel to selected neighboring pixels, including pixels of other colors in some cases, and determining if the pixel is likely corrupt, such as from a detective pixel. Corrupted pixels are then replaced using averages, means, maximums, or other statistical functions of select nearby pixels.