Interface method and apparatus for video imaging device
    1.
    发明授权
    Interface method and apparatus for video imaging device 有权
    视频成像装置的接口方法和装置

    公开(公告)号:US08089510B2

    公开(公告)日:2012-01-03

    申请号:US10928559

    申请日:2004-08-27

    IPC分类号: H04N7/00 H04N7/18 H04N5/225

    摘要: An interface (402) to a video imaging device (490) that generates captured frames of a video image (100) is described. The interface includes control registers (430) that store at least two sets of stream parameters (401) corresponding to at least two regions of interest (ROIs) and a function (410) that generates at least two corresponding ROI video streams (460) that are derived from the captured frames as essentially simultaneous output signals using the at least two sets of stream parameters. In some embodiments a new selection value (436) is determined from a current selection value and a derivative parameter stored as a portion of a set of stream parameters. In these embodiments, the generating of the at least two corresponding ROI video streams as essentially simultaneous output signals includes using the new selection value.

    摘要翻译: 描述了产生视频图像(100)的捕获帧的视频成像设备(490)的接口(402)。 接口包括控制寄存器(430),其存储对应于至少两个感兴趣区域(ROI)的至少两组流参数(401)和产生至少两个对应的ROI视频流(460)的功能(460),所述功能 使用至少两组流参数作为基本上同时的输出信号从捕获的帧导出。 在一些实施例中,根据作为一组流参数的一部分存储的当前选择值和导数参数来确定新的选择值(436)。 在这些实施例中,将至少两个对应的ROI视频流的生成作为基本上同时的输出信号包括使用新的选择值。

    Method and apparatus for memory address generation using dynamic stream descriptors
    2.
    发明授权
    Method and apparatus for memory address generation using dynamic stream descriptors 失效
    使用动态流描述符生成存储器地址的方法和装置

    公开(公告)号:US07634633B2

    公开(公告)日:2009-12-15

    申请号:US11565198

    申请日:2006-11-30

    IPC分类号: G06F12/00

    CPC分类号: G06T1/60 G06F9/345 G06F9/3455

    摘要: Memory addresses for a data stream are generated by a stream parameter generator that calculates a set of stream parameters for each of a number of memory access patterns and a regional address generator that calculates a sequence of addresses of a memory access pattern from a corresponding set of stream parameters. The stream parameters, which may include START_ADDRESS, STRIDE, SKIP and SPAN values for example, are updated in accordance with an update( ) function. The update( ) function, which may be defined by a user, defines how stream parameters change from one memory access pattern to the next. In one application, the update( ) function describes how the position, shape and/or size of a region of interest in an image changes or is expected to change.

    摘要翻译: 用于数据流的存储器地址由流参数生成器生成,流参数生成器为多个存储器访问模式中的每一个计算一组流参数集合,以及区域地址生成器,其从相应的一组存储器访问模式计算存储器访问模式的地址序列 流参数。 例如,可以包括START_ADDRESS,STRIDE,SKIP和SPAN值的流参数根据update()函数进行更新。 可以由用户定义的update()函数定义流参数如何从一个存储器访问模式改变到下一个存储器访问模式。 在一个应用程序中,update()函数描述图像中感兴趣区域的位置,形状和/或尺寸如何改变或预期会改变。

    Automatic generation of streaming data interface circuit
    3.
    发明授权
    Automatic generation of streaming data interface circuit 有权
    自动生成流数据接口电路

    公开(公告)号:US07603492B2

    公开(公告)日:2009-10-13

    申请号:US11231171

    申请日:2005-09-20

    IPC分类号: G06F13/00 G06F13/12 G06F15/00

    摘要: A streaming data interface device (700) of a streaming processing system (200) is automatically generated by selecting a set of circuit parameters (610) consistent with a set of circuit constraints and generating (612, 614) a representation of a candidate memory interface device based upon a set of stream descriptors. The candidate streaming data interface device is evaluated (616) with respect to one or more quality metrics and the representation of the candidate streaming processor circuit is output (622) if the candidate memory interface device satisfies a set of processing system constraints and is better in at least one of the one or more quality metrics than other candidate memory interface devices.

    摘要翻译: 通过选择与一组电路约束一致的一组电路参数(610)来自动生成流处理系统(200)的流数据接口设备(700),并生成(612,614)候选存储器接口的表示 设备基于一组流描述符。 对于一个或多个质量度量评估候选流数据接口设备(616),如果候选存储器接口设备满足一组处理系统约束并且更好地输出候选流处理器电路的表示(622) 所述一个或多个质量度量中的至少一个与其它候选存储器接口设备相比。

    METHOD AND APPARATUS FOR MEMORY ADDRESS GENERATION USING DYNAMIC STREAM DESCRIPTORS
    4.
    发明申请
    METHOD AND APPARATUS FOR MEMORY ADDRESS GENERATION USING DYNAMIC STREAM DESCRIPTORS 失效
    使用动态流描述符的存储器地址生成的方法和装置

    公开(公告)号:US20080133877A1

    公开(公告)日:2008-06-05

    申请号:US11565198

    申请日:2006-11-30

    IPC分类号: G06F12/02

    CPC分类号: G06T1/60 G06F9/345 G06F9/3455

    摘要: Memory addresses for a data stream are generated by a stream parameter generator that calculates a set of stream parameters for each of a number of memory access patterns and a regional address generator that calculates a sequence of addresses of a memory access pattern from a corresponding set of stream parameters. The stream parameters, which may include START_ADDRESS, STRIDE, SKIP and SPAN values for example, are updated in accordance with an update( ) function. The update( ) function, which may be defined by a user, defines how stream parameters change from one memory access pattern to the next. In one application, the update( ) function describes how the position, shape and/or size of a region of interest in an image changes or is expected to change.

    摘要翻译: 用于数据流的存储器地址由流参数生成器生成,流参数生成器为多个存储器访问模式中的每一个计算一组流参数集合,以及区域地址生成器,其从相应的一组存储器访问模式计算存储器访问模式的地址序列 流参数。 例如,可以包括START_ADDRESS,STRIDE,SKIP和SPAN值的流参数根据update()函数进行更新。 可以由用户定义的update()函数定义流参数如何从一个存储器访问模式改变到下一个存储器访问模式。 在一个应用程序中,update()函数描述图像中感兴趣区域的位置,形状和/或尺寸如何改变或预期会改变。

    STREAMING KERNEL SELECTION FOR RECONFIGURABLE PROCESSOR
    5.
    发明申请
    STREAMING KERNEL SELECTION FOR RECONFIGURABLE PROCESSOR 失效
    为可重构加工商流程选择KERNEL选择

    公开(公告)号:US20070213851A1

    公开(公告)日:2007-09-13

    申请号:US11276657

    申请日:2006-03-09

    IPC分类号: G05B13/02

    CPC分类号: G06F8/433

    摘要: In one embodiment, a subset of a set of streaming kernels of an application is selected for implementation on a reconfigurable processor. The streaming kernels are selected by first forming a stream flow graph of the application by parsing a program of instructions of the application, the stream flow graph having kernel nodes and edges, and determining benefit and cost values for each kernel node in the stream flow graph. Next, a subset of the kernel nodes that maximizes a weighted sum of the benefits values is selected, subject to a constraint that the sum of cost values is not greater than a prescribed value for the reconfigurable processor.

    摘要翻译: 在一个实施例中,应用的一组流内核的子集被选择用于在可重新配置的处理器上实现。 通过首先通过解析应用程序的指令程序,具有内核节点和边缘的流流图,并且确定流流图中的每个内核节点的有益和成本值来首先形成应用的流流程图来选择流内核 。 接下来,选择最大化益处值的加权和的内核节点的子集,受到成本值的总和不大于可重构处理器的规定值的约束。

    Method and apparatus for transforming a non-linear lens-distorted image
    7.
    发明授权
    Method and apparatus for transforming a non-linear lens-distorted image 有权
    用于变换非线性透镜失真图像的方法和装置

    公开(公告)号:US08326077B2

    公开(公告)日:2012-12-04

    申请号:US12262363

    申请日:2008-10-31

    IPC分类号: G06K9/40

    摘要: A method and apparatus for image processing a lens-distorted image (e.g., a fisheye image) is provided. The method includes partitioning coordinate points in a selected output image into tiles. The output image is an undistorted rendition of a subset of the lens-distorted image. Coordinate points on a border of the tiles in the output image are selected. For each tile, coordinate points in the lens-distorted image corresponding to each selected coordinate point in the output image are calculated. In addition, for each tile, a bounding box on the lens-distorted image is selected. The bounding box includes the calculated coordinates in the lens-distorted image. The bounding boxes are expanded so that they encompass all coordinate points in the lens-distorted image that map to all coordinate points in their respective corresponding tiles. Output pixel values are generated for each tile from pixel values in their corresponding expanded bounding boxes.

    摘要翻译: 提供了一种用于图像处理镜片失真图像(例如,鱼眼图像)的方法和装置。 该方法包括将所选输出图像中的坐标点分割成瓦片。 输出图像是透镜失真图像的子集的未失真的再现。 选择输出图像中瓦片边框的坐标点。 对于每个瓦片,计算与输出图像中的每个所选坐标点相对应的透镜失真图像中的坐标点。 另外,对于每个瓦片,选择透镜失真图像上的边界框。 边界框包括透镜失真图像中计算的坐标。 边界框被扩展,使得它们包含映射到它们各自对应的瓦片中的所有坐标点的透镜失真图像中的所有坐标点。 从其对应的扩展边界框中的像素值为每个图块生成输出像素值。

    Method and Apparatus for Configuring Buffers for Streaming Data Transfer
    8.
    发明申请
    Method and Apparatus for Configuring Buffers for Streaming Data Transfer 失效
    用于配置数据流传输缓冲器的方法和装置

    公开(公告)号:US20080244152A1

    公开(公告)日:2008-10-02

    申请号:US11694523

    申请日:2007-03-30

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0646

    摘要: A specification of a configurable processor is generated by generating (1) specifications of first and second stream memory interfaces to be operable to access data in accordance with first and second stream descriptors, and (2) a specification of an interim data storage device (buffer) to be accessed by the first and second stream memory interfaces and to be operable to receive data from a first computational module via the first stream memory interface and to transfer data to a second computational module via the second stream memory interface. The specifications are output and may be used to configure a configurable processor.

    摘要翻译: 通过生成(1)第一和第二流存储器接口的规格来生成可配置处理器的规范,以便根据第一和第二流描述符访问数据,以及(2)临时数据存储设备(缓冲器) )被第一和第二流存储器接口访问,并且可操作以经由第一流存储器接口从第一计算模块接收数据,并经由第二流存储器接口将数据传送到第二计算模块。 输出规格,可用于配置可配置的处理器。

    METHOD FOR DYNAMIC MEMORY ALLOCATION ON RECONFIGURABLE LOGIC
    9.
    发明申请
    METHOD FOR DYNAMIC MEMORY ALLOCATION ON RECONFIGURABLE LOGIC 审中-公开
    动态记忆分配方法在可重构逻辑上的应用

    公开(公告)号:US20080162856A1

    公开(公告)日:2008-07-03

    申请号:US11618326

    申请日:2006-12-29

    IPC分类号: G06F12/02

    CPC分类号: G06F12/023 G06F17/5054

    摘要: A method, apparatus, and electronic device for improving memory performance are disclosed. The method may include automatically checking reconfigurable logic for available memory and executing a first memory allocation to the available memory.

    摘要翻译: 公开了一种用于提高存储器性能的方法,装置和电子设备。 该方法可以包括自动检查可用存储器的可重构逻辑,并且向可用存储器执行第一存储器分配。

    Dynamic access scheduling memory controller
    10.
    发明授权
    Dynamic access scheduling memory controller 失效
    动态访问调度内存控制器

    公开(公告)号:US07363406B2

    公开(公告)日:2008-04-22

    申请号:US11007704

    申请日:2004-12-08

    IPC分类号: G06F13/14

    CPC分类号: G06F13/161 Y02D10/14

    摘要: Bus transactions in a memory controller are scheduled by storing a set of configuration parameters that define a bus scheduling policy, generating values of a set of dynamic cost functions for each bus transaction, ordering the bus transactions in accordance with the bus scheduling policy to produce ordered bus transactions and generating a memory transaction that is derived from the ordered bus transactions. The memory controller includes one or more control registers for storing the set of configuration parameters, a bus interface operable to capture bus transactions from applications, a set of buffers operable to store the bus transactions and the set of dynamic cost functions and one or more registers operable to store the statistical data and a cost policy. The memory controller selects the order of the bus transactions based on an arbitration and selection policy and generates memory transactions to an external memory.

    摘要翻译: 通过存储定义总线调度策略的一组配置参数来调度存储器控制器中的总线事务,为每个总线事务生成一组动态成本函数的值,根据总线调度策略排序总线事务以产生有序 总线事务并生成从有序总线事务导出的内存事务。 所述存储器控制器包括用于存储所述一组配置参数的一个或多个控制寄存器,用于从应用程序捕获总线事务的总线接口,可用于存储所述总线事务和一组动态成本函数的一组缓冲器以及一个或多个寄存器 可操作地存储统计数据和成本政策。 存储器控制器基于仲裁和选择策略选择总线事务的顺序,并且向外部存储器生成存储器事务。