High resistance silicon wafer and method for production thereof
    1.
    发明申请
    High resistance silicon wafer and method for production thereof 有权
    高电阻硅晶片及其制造方法

    公开(公告)号:US20050253221A1

    公开(公告)日:2005-11-17

    申请号:US10512405

    申请日:2003-04-16

    CPC分类号: H01L21/3225

    摘要: A high-resistance silicon wafer is manufactured in which a gettering ability, mechanical strength, and economical efficiency are excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is implemented on the side of a device maker. A heat treatment for forming an oxygen precipitate nucleus is performed at 500 to 900° C. for 5 hours or more in a non-oxidizing atmosphere and a heat treatment for growing an oxygen precipitate is performed at 950 to 1050° C. for 10 hours or more on a high-oxygen and carbon-doped high-resistance silicon wafer in which resistivity is 100 Ωcm or more, an oxygen concentration is 14×1017 atoms/cm3 (ASTM F-121, 1979) or more and a carbon concentration is 0.5×1016 atoms/cm3 or more. By these heat treatments, a remaining oxygen concentration in the wafer is controlled to be 12×1017 atoms/cm3 (ASTM F-121, 1979) or less. Thus, there is provided a high-resistance, low-oxygen and high-strength silicon wafer in which resistivity is 100 Ωcm or more and an oxygen precipitate (BMD) having a size of 0.2 μm is formed so as to have high density of 1×104/cm2 or more.

    摘要翻译: 制造高电阻硅晶片,其中吸收能力,机械强度和经济效率优异,并且在用于形成电路的热处理中有效地防止了氧热供体的产生,该电路在 设备制造商。 在非氧化性气氛中,在500〜900℃下进行形成氧沉淀核的热处理5小时以上,在950〜1050℃下进行氧沉淀的热处理10小时 以上,电阻率为100Ωm以上的高氧和碳掺杂高电阻硅晶片,氧浓度为14×10 17原子/ cm 3(以下) ASTM F-121,1979)或更高,碳浓度为0.5×10 16原子/ cm 3以上。 通过这些热处理,将晶片中的剩余氧浓度控制为12×10 17原子/ cm 3(ASTM F-121,1979)或更小。 因此,提供了电阻率为100Ωm或更大的高电阻,低氧和高强度硅晶片,并且形成具有0.2μm大小的氧沉淀物(BMD),以便具有高密度的1×10 4/4以上。

    High resistance silicon wafer and its manufacturing method
    2.
    发明授权
    High resistance silicon wafer and its manufacturing method 有权
    高电阻硅晶片及其制造方法

    公开(公告)号:US07397110B2

    公开(公告)日:2008-07-08

    申请号:US10512405

    申请日:2003-04-16

    IPC分类号: H01L29/36 H01L21/322

    CPC分类号: H01L21/3225

    摘要: A high-resistance silicon wafer is manufactured in which a gettering ability, mechanical strength, and economical efficiency are excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is implemented on the side of a device maker. A heat treatment for forming an oxygen precipitate nucleus is performed at 500 to 900° C. for 5 hours or more in a non-oxidizing atmosphere and a heat treatment for growing an oxygen precipitate is performed at 950 to 1050° C. for 10 hours or more on a high-oxygen and carbon-doped high-resistance silicon wafer in which resistivity is 100 Ωcm or more, an oxygen concentration is 14×1017 atoms/cm3 (ASTM F-121, 1979) or more and a carbon concentration is 0.5×1016 atoms/cm3 or more. By these heat treatments, a remaining oxygen concentration in the wafer is controlled to be 12×1017 atoms/cm3 (ASTM F-121, 1979) or less. Thus, there is provided a high-resistance, low-oxygen and high-strength silicon wafer in which resistivity is 100 Ωcm or more and an oxygen precipitate (BMD) having a size of 0.2 μm is formed so as to have high density of 1×104/cm2 or more.

    摘要翻译: 制造高电阻硅晶片,其中吸收能力,机械强度和经济效率优异,并且在用于形成电路的热处理中有效地防止了氧热供体的产生,该电路在 设备制造商。 在非氧化性气氛中,在500〜900℃下进行形成氧沉淀核的热处理5小时以上,在950〜1050℃下进行氧沉淀的热处理10小时 以上,电阻率为100Ωm以上的高氧和碳掺杂高电阻硅晶片,氧浓度为14×10 17原子/ cm 3(以下) ASTM F-121,1979)或更高,碳浓度为0.5×10 16原子/ cm 3以上。 通过这些热处理,将晶片中的剩余氧浓度控制为12×10 17原子/ cm 3(ASTM F-121,1979)或更小。 因此,提供了电阻率为100Ωm或更大的高电阻,低氧和高强度硅晶片,并且形成具有0.2μm大小的氧沉淀物(BMD),以便具有高密度的1×10 4/4以上。

    High-resistance silicon wafer and process for producing the same
    3.
    发明授权
    High-resistance silicon wafer and process for producing the same 有权
    高电阻硅晶片及其制造方法

    公开(公告)号:US07316745B2

    公开(公告)日:2008-01-08

    申请号:US10519837

    申请日:2003-06-30

    摘要: A high-resistance silicon wafer is manufactured, in which a gettering ability and economical efficiency is excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is to be implemented on the side of a device manufacturer. In order to implement the above, a high-temperature heat treatment at 1100° C. or higher is performed on a carbon doped high-resistance and high-oxygen silicon wafer in which specific resistivity is 100 Ωcm or more and a carbon concentration is 5×1015 to 5×1017 atoms/cm3 so that a remaining oxygen concentration becomes 6.5×1017 atoms/cm3 or more (Old-ASTM). As this high-temperature treatment, an OD treatment for forming a DZ layer on a wafer surface, a high-temperature annealing treatment for eliminating a COP on the surface layer, a high-temperature heat treatment for forming a BOX layer in a SIMOX wafer manufacturing process and the like can be used.

    摘要翻译: 制造高电阻硅晶片,其中吸收能力和经济效率优异,并且在用于形成电路的热处理中有效地防止氧热供体被产生,该电路将在器件的一侧 制造商。 为了实现上述,在比电阻率为100Ω·以上且碳浓度为5×10 6的碳掺杂高电阻和高氧硅晶片上进行1100℃以上的高温热处理 15至15×10 17原子/ cm 3,使得剩余的氧浓度为6.5×10 17原子/ cm 3, SUP> 3以上(旧ASTM)。 作为这种高温处理,在晶片表面上形成DZ层的OD处理,用于消除表面层上的COP的高温退火处理,在SIMOX晶片中形成BOX层的高温热处理 可以使用制造工艺等。

    High-resistance silicon wafer and process for producing the same
    4.
    发明申请
    High-resistance silicon wafer and process for producing the same 有权
    高电阻硅晶片及其制造方法

    公开(公告)号:US20050250349A1

    公开(公告)日:2005-11-10

    申请号:US10519837

    申请日:2003-06-30

    摘要: A high-resistance silicon wafer is manufactured, in which a gettering ability and economical efficiency is excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is to be implemented on the side of a device manufacturer. In order to implement the above, a high-temperature heat treatment at 1100° C. or higher is performed on a carbon doped high-resistance and high-oxygen silicon wafer in which specific resistivity is 100 Ωcm or more and a carbon concentration is 5×1015 to 5×1017 atoms/cm3 so that a remaining oxygen concentration becomes 6.5×1017 atoms/cm3 or more (Old-ASTM). As this high-temperature treatment, an OD treatment for forming a DZ layer on a wafer surface, a high-temperature annealing treatment for eliminating a COP on the surface layer, a high-temperature heat treatment for forming a BOX layer in a SIMOX wafer manufacturing process and the like can be used.

    摘要翻译: 制造高电阻硅晶片,其中吸收能力和经济效率优异,并且在用于形成电路的热处理中有效地防止氧热供体被产生,该电路将在器件的一侧 制造商。 为了实现上述,在比电阻率为100Ω·以上且碳浓度为5×10 6的碳掺杂高电阻和高氧硅晶片上进行1100℃以上的高温热处理 15至15×10 17原子/ cm 3,使得剩余的氧浓度为6.5×10 17原子/ cm 3, SUP> 3以上(旧ASTM)。 作为这种高温处理,在晶片表面上形成DZ层的OD处理,用于消除表面层上的COP的高温退火处理,在SIMOX晶片中形成BOX层的高温热处理 可以使用制造工艺等。

    Evaluation method of IG effectivity in semiconductor silicon substrates
    5.
    发明授权
    Evaluation method of IG effectivity in semiconductor silicon substrates 有权
    半导体硅衬底中IG有效性的评估方法

    公开(公告)号:US06803242B2

    公开(公告)日:2004-10-12

    申请号:US10422847

    申请日:2003-04-25

    IPC分类号: H01L2166

    CPC分类号: H01L21/3225 H01L22/14

    摘要: In a conventional evaluation method of IG effectivity on Cu in semiconductor silicon substrates, it is required to actually conduct the device process, or a great deal of time, manpower and expenses for manufacturing a MOS device for dielectric breakdown estimation and the like are needed, but in the present invention, the problem was solved by experimentally finding in advance the optimum ranges of the diagonal length and density of oxygen precipitates which make the IG effectivity on Cu favorable, and conducting a heat treatment for the addition of IG effectivity based on a simulation by calculations using Fokker-Planck equations so that the diagonal length and density of plate-like precipitates fall within the optimum ranges.

    摘要翻译: 在半导体硅衬底中对IG有效性的传统评估方法中,需要实际进行器件工艺或大量时间用于制造用于介质击穿估计的MOS器件等的人力和费用, 但是在本发明中,通过实验性地发现使IG的有效性对Cu的对角线长度和密度的最佳范围有利地进行实验,并且进行热处理以基于 通过使用Fokker-Planck方程的计算进行模拟,使得板状沉淀物的对角线长度和密度落在最佳范围内。

    Heat shrinkable polypropylene laminate film
    6.
    发明授权
    Heat shrinkable polypropylene laminate film 失效
    热收缩聚丙烯层压膜

    公开(公告)号:US5620803A

    公开(公告)日:1997-04-15

    申请号:US648011

    申请日:1996-05-29

    IPC分类号: B29C55/28 B32B27/32 B32B27/08

    摘要: The heat shrinkable polypropylene film having an isotactic polypropylene layer as surface layers and a layer mainly composed of a syndiotactic polypropylene as an intermediate layer, having a shrinkage of not less than 25% at 100.degree. C. in the machine and transverse directions and being stretched at least two times in the machine and transverse directions, respectively. The film has a good packaging machine applicability and excellent propagation tear resistance, low temperature shrinkability and heat resistance, and is suitably used as a shrink packaging material.

    摘要翻译: PCT No.PCT / JP95 / 01915 Sec。 371日期:1996年5月29日 102(e)日期1996年5月29日PCT提交1995年9月22日PCT公布。 公开号WO96 / 09931 日期1996年4月4日具有全同立构聚丙烯层作为表层的热收缩聚丙烯膜和主要由间同立构聚丙烯作为中间层的层,在机器中在100℃下收缩率不低于25% 横向,并分别在机器和横向上被拉伸至少两次。 该膜具有良好的包装机适用性和优异的抗拉伸性,耐低温收缩性和耐热性,适用于收缩包装材料。

    Heat shrinkable polyolefin laminate film
    7.
    发明授权
    Heat shrinkable polyolefin laminate film 失效
    热收缩聚烯烃层压膜

    公开(公告)号:US5691049A

    公开(公告)日:1997-11-25

    申请号:US648006

    申请日:1996-05-24

    摘要: A heat shrinkable polyolefin laminate film having surface layers made of a crystalline polypropylene resin, and an intermediate layer made of an ethylene resin composition consisting essentially of a linear low density polyethylene and a syndiotactic polypropylene, which is stretched at least two times in the machine and transverse directions, respectively, and which does not cause lowering of the transparency even if recovered films are incorporated into the intermediate layer, is excellent in low temperature shrinkability and packaging machine applicability, and is suitably used as a heat shrinkable packaging material.

    摘要翻译: PCT No.PCT / JP95 / 01914 Sec。 371日期:1996年5月24日 102(e)日期1996年5月24日PCT提交1995年9月22日PCT公布。 出版物WO96 / 09930 日期1996年4月4日一种具有由结晶聚丙烯树脂制成的表面层的热收缩聚烯烃层压膜和由基本上由线性低密度聚乙烯和间同立构聚丙烯组成的乙烯树脂组合物制成的中间层,其被拉伸至少两个 即使在中间层中加入回收膜也不会降低透明性,低温收缩性和包装机适用性优异,适合用作热收缩性包装 材料。