Timing Margin Detecting Circuit, Timing Margin Detecting Method and Clock and Data Recovery System

    公开(公告)号:US20220006460A1

    公开(公告)日:2022-01-06

    申请号:US16920363

    申请日:2020-07-02

    Abstract: A timing margin detecting circuit is provided. The timing margin detecting circuit comprises a delay element, receiving a first data signal and a first clock signal, configured to generate a second data signal and a second clock signal, wherein the second clock signal has a delay relative to the second data signal; a controller, configured to generate the control signal to control the delay of the second clock signal relative to the second data signal; a sampler, coupled to the delay element, configured to generate a sampled data signal according to the second data signal and the second clock signal; and a bit error rate determination circuit, coupled to the sampler, configured to determine whether the sampled data signal is the same as a predefined test pattern and generate a determination result accordingly; wherein the controller determines a timing margin according to the determination result.

    Integrated circuit and anti-interference method thereof

    公开(公告)号:US10699618B2

    公开(公告)日:2020-06-30

    申请号:US16231418

    申请日:2018-12-22

    Abstract: An integrated circuit for driving a display panel and an anti-interference method are provided. The integrated circuit includes a source driving circuit and an anti-interference circuit. The source driving circuit includes a receiving circuit configured to receive an input signal including image data and process the input signal based on at least one operation parameter to generate output data. The anti-interference circuit is coupled to the receiving circuit. The anti-interference circuit determines whether an interference event occurs to the input signal based on the input signal or the output data to obtain a determination result and determines whether to adjust the at least one operation parameter of the receiving circuit according to the determination result.

    INTEGRATED CIRCUIT AND ANTI-INTERFERENCE METHOD THEREOF

    公开(公告)号:US20190341000A1

    公开(公告)日:2019-11-07

    申请号:US16231414

    申请日:2018-12-22

    Abstract: An integrated circuit for driving a display panel and an anti-interference method are provided. The integrated circuit includes a source driving circuit and an anti-interference circuit. The source driving circuit includes a receiving circuit configured to receive an input signal including image data and process the input signal based on at least one operation parameter to generate output data. The anti-interference circuit is coupled to the receiving circuit. The anti-interference circuit is configured to adjust the at least one operation parameter of the receiving circuit from at least one normal parameter to at least one anti-interference parameter when an interference event occurs to the input signal. The anti-interference circuit is configured to maintain the at least one operation parameter of the receiving circuit at the at least one normal parameter when the interference event does not occur.

    Delay apparatus
    4.
    发明授权

    公开(公告)号:US09634651B1

    公开(公告)日:2017-04-25

    申请号:US15210870

    申请日:2016-07-14

    Inventor: Wei-Sheng Tseng

    CPC classification number: H03K5/134 H03K2005/00019

    Abstract: A delay apparatus includes a plurality of stage circuits, a first current source, a second current source and a switch. The stage circuits connected in series to each other. The first current source is coupled to the first power terminal of the first stage circuit. In some embodiments, the second current source is coupled to the first power terminal of the second stage circuit, and the first and second terminals of the switch are respectively coupled to the first power terminal of the first stage circuit and the first power terminal of the second stage circuit. In other embodiments, the first and second terminals of the switch are respectively coupled to the first power terminal of the second stage circuit and the second current source, and the first power terminal of the first stage circuit is coupled to the first power terminal of the second stage circuit through a wire.

    Timing margin detecting circuit, timing margin detecting method and clock and data recovery system

    公开(公告)号:US11456749B2

    公开(公告)日:2022-09-27

    申请号:US16920363

    申请日:2020-07-02

    Abstract: A timing margin detecting circuit is provided. The timing margin detecting circuit comprises a delay element, receiving a first data signal and a first clock signal, configured to generate a second data signal and a second clock signal, wherein the second clock signal has a delay relative to the second data signal; a controller, configured to generate the control signal to control the delay of the second clock signal relative to the second data signal; a sampler, coupled to the delay element, configured to generate a sampled data signal according to the second data signal and the second clock signal; and a bit error rate determination circuit, coupled to the sampler, configured to determine whether the sampled data signal is the same as a predefined test pattern and generate a determination result accordingly; wherein the controller determines a timing margin according to the determination result.

    Clock recovery device and method
    6.
    发明授权

    公开(公告)号:US10044357B1

    公开(公告)日:2018-08-07

    申请号:US15667716

    申请日:2017-08-03

    Abstract: A clock recovery device is provided. The clock recovery device includes a clock data recovery circuit and a fast relock circuit. The clock data recovery circuit is configured to generate an output clock signal in response to an input clock signal. The clock data recovery circuit includes a charge pump for generating a control voltage and a voltage controlled block for generating the output clock signal based on the control voltage. The fast relock circuit is configured to convert a comparison signal indicating a comparison result between the input clock signal and the output clock signal to an analog output voltage. When the charge pump is disabled, an output path of the fast relock circuit is turned on, and the analog output voltage is applied to an input of the voltage controlled block.

    Method, device and display driver having a filtered command signal

    公开(公告)号:US11244641B2

    公开(公告)日:2022-02-08

    申请号:US17006912

    申请日:2020-08-31

    Abstract: A device is applicable to a display driver, including a sampling circuit and a logic circuit. The sampling circuit is configured to sample a command signal by recording a plurality of command values of the command signal at different times. The plurality of command values corresponds to at least one data line of a pixel circuit. The logic circuit is electrically coupled to the sampling circuit, and is configured to receive the plurality of command values. The logic circuit is further configured to generate a filtered command signal according to the plurality of command values, and is configured to provide the filtered command signal to drive the pixel circuit.

    Integrated circuit and anti-interference method thereof

    公开(公告)号:US11145232B2

    公开(公告)日:2021-10-12

    申请号:US16865424

    申请日:2020-05-04

    Abstract: An integrated circuit for driving a display panel and an anti-interference method are provided. The integrated circuit can include a source driving circuit and an anti-interference circuit. The source driving circuit includes a receiving circuit configured to receive an input signal including image data and process the input signal based on at least one operation parameter to generate output data. The anti-interference circuit is coupled to the receiving circuit. The anti-interference circuit can determine whether an interference event occurs to the input signal based on the input signal or the output data to obtain a determination result and determines whether to adjust the at least one operation parameter of the receiving circuit according to the determination result.

    Integrated circuit and anti-interference method thereof

    公开(公告)号:US11024209B2

    公开(公告)日:2021-06-01

    申请号:US16231414

    申请日:2018-12-22

    Abstract: An integrated circuit for driving a display panel and an anti-interference method are provided. The integrated circuit includes a source driving circuit and an anti-interference circuit. The source driving circuit includes a receiving circuit configured to receive an input signal including image data and process the input signal based on at least one operation parameter to generate output data. The anti-interference circuit is coupled to the receiving circuit. The anti-interference circuit is configured to adjust the at least one operation parameter of the receiving circuit from at least one normal parameter to at least one anti-interference parameter when an interference event occurs to the input signal. The anti-interference circuit is configured to maintain the at least one operation parameter of the receiving circuit at the at least one normal parameter when the interference event does not occur.

    INTEGRATED CIRCUIT AND ANTI-INTERFERENCE METHOD THEREOF

    公开(公告)号:US20200265766A1

    公开(公告)日:2020-08-20

    申请号:US16865424

    申请日:2020-05-04

    Abstract: An integrated circuit for driving a display panel and an anti-interference method are provided. The integrated circuit can include a source driving circuit and an anti-interference circuit. The source driving circuit includes a receiving circuit configured to receive an input signal including image data and process the input signal based on at least one operation parameter to generate output data. The anti-interference circuit is coupled to the receiving circuit. The anti-interference circuit can determine whether an interference event occurs to the input signal based on the input signal or the output data to obtain a determination result and determines whether to adjust the at least one operation parameter of the receiving circuit according to the determination result.

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