公开(公告)号：US09329671B2

公开(公告)日：2016-05-03

申请号：US13753174

申请日：2013-01-29

Applicant: Nvidia Corporation

Inventor： Greg Heinrich ,  Philippe Guasch

IPC: G06F1/26 ,  G06F1/32 ,  G06F9/48

CPC classification number: G06F1/329 ,  G06F1/3203 ,  G06F1/3293 ,  G06F9/4893 ,  Y02D10/122 ,  Y02D10/24

Abstract: Computer system, method and computer program product for scheduling IPC activities are disclosed. In one embodiment, the computer system includes first processor and second processors that communicate with each other via IPC activities. The second processor may operate in a first mode in which the second processor is able to process IPC activities, or a second mode in which the second processor does not process IPC activities. Processing apparatus associated with the first processor identifies which of the pending IPC activities for communicating from the first processor to the second processor are not real-time sensitive, and schedules the identified IPC activities for communicating from the first processor to the second processor by delaying some of the identified IPC activities to thereby group them together. The grouped IPC activities are scheduled for communicating to the second processor during a period in which the second processor is continuously in the first mode.

Abstract translation: 披露了IPC活动安排的计算机系统，方法和计算机程序产品。 在一个实施例中，计算机系统包括通过IPC活动彼此通信的第一处理器和第二处理器。 第二处理器可以在其中第二处理器能够处理IPC活动的第一模式中操作，或第二模式，其中第二处理器不处理IPC活动。 与第一处理器相关联的处理装置识别用于从第一处理器到第二处理器进行通信的待处理IPC活动中的哪一个不是实时敏感的，并且通过延迟一些从第一处理器到第二处理器的通信来调度所识别的IPC活动 的IPC活动，从而将它们组合在一起。 分组的IPC活动被安排用于在第二处理器连续处于第一模式的时段期间与第二处理器进行通信。

公开(公告)号：US20140215236A1

公开(公告)日：2014-07-31

申请号：US13753174

申请日：2013-01-29

Applicant: NVIDIA CORPORATION

Inventor： Greg Heinrich ,  Philippe Guasch

IPC: G06F1/32

CPC classification number: G06F1/329 ,  G06F1/3203 ,  G06F1/3293 ,  G06F9/4893 ,  Y02D10/122 ,  Y02D10/24

Abstract: Computer system, method and computer program product for scheduling IPC activities are disclosed. In one embodiment, the computer system includes first processor and second processors that communicate with each other via IPC activities. The second processor may operate in a first mode in which the second processor is able to process IPC activities, or a second mode in which the second processor does not process IPC activities. Processing apparatus associated with the first processor identifies which of the pending IPC activities for communicating from the first processor to the second processor are not real-time sensitive, and schedules the identified IPC activities for communicating from the first processor to the second processor by delaying some of the identified IPC activities to thereby group them together. The grouped IPC activities are scheduled for communicating to the second processor during a period in which the second processor is continuously in the first mode.

Abstract translation: 披露了IPC活动安排的计算机系统，方法和计算机程序产品。 在一个实施例中，计算机系统包括通过IPC活动彼此通信的第一处理器和第二处理器。 第二处理器可以在其中第二处理器能够处理IPC活动的第一模式中操作，或第二模式，其中第二处理器不处理IPC活动。 与第一处理器相关联的处理装置识别用于从第一处理器到第二处理器进行通信的待处理IPC活动中的哪一个不是实时敏感的，并且通过延迟一些从第一处理器到第二处理器的通信来调度所识别的IPC活动 的IPC活动，从而将它们组合在一起。 分组的IPC活动被安排用于在第二处理器连续处于第一模式的时段期间与第二处理器进行通信。