公开(公告)号：US20140281237A1

公开(公告)日：2014-09-18

申请号：US13830967

申请日：2013-03-14

Applicant: ORACLE INTERNATIONAL CORPORATION

Inventor： Paul N. Loewenstein ,  Stephen E. Phillips ,  David Richard Smentek ,  Connie Wai Mun Cheung ,  Serena Wing Yee Leung ,  Damien Walker ,  Ramaswamy Sivaramakrishnan

IPC: G06F12/08

CPC classification number: G06F12/0808 ,  G06F12/0811 ,  G06F12/0817 ,  G06F12/0828

Abstract: A method for cache coherence, including: broadcasting, by a requester cache (RC) over a partially-ordered request network (RN), a peer-to-peer (P2P) request for a cacheline to a plurality of slave caches; receiving, by the RC and over the RN while the P2P request is pending, a forwarded request for the cacheline from a gateway; receiving, by the RC and after receiving the forwarded request, a plurality of responses to the P2P request from the plurality of slave caches; setting an intra-processor state of the cacheline in the RC, wherein the intra-processor state also specifies an inter-processor state of the cacheline; and issuing, by the RC, a response to the forwarded request after setting the intra-processor state and after the P2P request is complete; and modifying, by the RC, the intra-processor state in response to issuing the response to the forwarded request.

Abstract translation: 一种用于高速缓存一致性的方法，包括：通过部分有序请求网络（RN）的请求者缓存（RC）广播对多个从高速缓存的高速缓存线的对等（P2P）请求; 当P2P请求正在等待时，由RC接收和通过RN接收来自网关的高速缓存行的转发请求; 由所述RC接收所述转发请求后，从所述多个从属高速缓存中接收对所述P2P请求的多个响应; 在所述RC中设置所述高速缓存行的处理器内状态，其中所述处理器内状态还指定所述高速缓存行的处理器间状态; 以及在设置处理器内状态之后，在P2P请求完成之后，由RC发出对转发请求的响应; 以及响应于发出对所转发的请求的响应，由RC修改处理器内状态。

公开(公告)号：US08972663B2

公开(公告)日：2015-03-03

申请号：US13830967

申请日：2013-03-14

Applicant: Oracle International Corporation

Inventor： Paul N. Loewenstein ,  Stephen E. Phillips ,  David Richard Smentek ,  Connie Wai Mun Cheung ,  Serena Wing Yee Leung ,  Damien Walker ,  Ramaswamy Sivaramakrishnan

IPC: G06F12/00 ,  G06F12/08

CPC classification number: G06F12/0808 ,  G06F12/0811 ,  G06F12/0817 ,  G06F12/0828

Abstract: A method for cache coherence, including: broadcasting, by a requester cache (RC) over a partially-ordered request network (RN), a peer-to-peer (P2P) request for a cacheline to a plurality of slave caches; receiving, by the RC and over the RN while the P2P request is pending, a forwarded request for the cacheline from a gateway; receiving, by the RC and after receiving the forwarded request, a plurality of responses to the P2P request from the plurality of slave caches; setting an intra-processor state of the cacheline in the RC, wherein the intra-processor state also specifies an inter-processor state of the cacheline; and issuing, by the RC, a response to the forwarded request after setting the intra-processor state and after the P2P request is complete; and modifying, by the RC, the intra-processor state in response to issuing the response to the forwarded request.

Abstract translation: 一种用于高速缓存一致性的方法，包括：通过部分有序请求网络（RN）的请求者缓存（RC）广播对多个从高速缓存的高速缓存线的对等（P2P）请求; 当P2P请求正在等待时，由RC接收和通过RN接收来自网关的高速缓存行的转发请求; 由所述RC接收所述转发请求后，从所述多个从属高速缓存中接收对所述P2P请求的多个响应; 在所述RC中设置所述高速缓存行的处理器内状态，其中所述处理器内状态还指定所述高速缓存行的处理器间状态; 以及在设置处理器内状态之后，在P2P请求完成之后，由RC发出对转发请求的响应; 以及响应于发出对所转发的请求的响应，由RC修改处理器内状态。

公开(公告)号：US10467139B2

公开(公告)日：2019-11-05

申请号：US15859037

申请日：2017-12-29

Applicant: Oracle International Corporation

Inventor： Paul N. Loewenstein ,  Damien Walker ,  Priyambada Mitra ,  Ali Vahidsafa ,  Matthew Cohen ,  Josephus Ebergen ,  Andrew Brock

IPC: G06F12/0817 ,  G06F12/0813 ,  G06F12/0842

Abstract: A cache coherence system manages both internode and intranode cache coherence in a cluster of nodes. Each node in the cluster of nodes is either a collection of processors running an intranode coherence protocol between themselves, or a single processor. A node comprises a plurality of coherence ordering units (COUs) that are hardware circuits configured to manage intranode coherence of caches within the node and/or internode coherence with caches on other nodes in the cluster. Each node contains one or more directories which tracks the state of cache line entries managed by the particular node. Each node may also contain one or more scoreboards for managing the status of ongoing transactions. The internode cache coherence protocol implemented in the COUs may be used to detect and resolve communications errors, such as dropped message packets between nodes, late message delivery at a node, or node failure. Additionally, a transport layer manages communication between the nodes in the cluster, and can additionally be used to detect and resolve communications errors.

公开(公告)号：US10452547B2

公开(公告)日：2019-10-22

申请号：US15858787

申请日：2017-12-29

Applicant: Oracle International Corporation

Inventor： Paul N. Loewenstein ,  Damien Walker ,  Priyambada Mitra ,  Ali Vahidsafa ,  Matthew Cohen ,  Josephus Ebergen ,  Andrew Brock

IPC: G06F12/00 ,  G06F12/0817 ,  G06F12/128 ,  G06F12/0813

Abstract: A cache coherence system manages both internode and intranode cache coherence in a cluster of nodes. Each node in the cluster of nodes is either a collection of processors running an intranode coherence protocol between themselves, or a single processor. A node comprises a plurality of coherence ordering units (COUs) that are hardware circuits configured to manage intranode coherence of caches within the node and/or internode coherence with caches on other nodes in the cluster. Each node contains one or more directories which tracks the state of cache line entries managed by the particular node. Each node may also contain one or more scoreboards for managing the status of ongoing transactions. The internode cache coherence protocol implemented in the COUs may be used to detect and resolve communications errors, such as dropped message packets between nodes, late message delivery at a node, or node failure. Additionally, a transport layer manages communication between the nodes in the cluster, and can additionally be used to detect and resolve communications errors.