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公开(公告)号：US10467139B2
公开(公告)日：2019-11-05
申请号：US15859037
申请日：2017-12-29
Applicant: Oracle International Corporation
Inventor： Paul N. Loewenstein , Damien Walker , Priyambada Mitra , Ali Vahidsafa , Matthew Cohen , Josephus Ebergen , Andrew Brock
IPC: G06F12/0817 , G06F12/0813 , G06F12/0842
Abstract: A cache coherence system manages both internode and intranode cache coherence in a cluster of nodes. Each node in the cluster of nodes is either a collection of processors running an intranode coherence protocol between themselves, or a single processor. A node comprises a plurality of coherence ordering units (COUs) that are hardware circuits configured to manage intranode coherence of caches within the node and/or internode coherence with caches on other nodes in the cluster. Each node contains one or more directories which tracks the state of cache line entries managed by the particular node. Each node may also contain one or more scoreboards for managing the status of ongoing transactions. The internode cache coherence protocol implemented in the COUs may be used to detect and resolve communications errors, such as dropped message packets between nodes, late message delivery at a node, or node failure. Additionally, a transport layer manages communication between the nodes in the cluster, and can additionally be used to detect and resolve communications errors.
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公开(公告)号：US10452547B2
公开(公告)日：2019-10-22
申请号：US15858787
申请日：2017-12-29
Applicant: Oracle International Corporation
Inventor： Paul N. Loewenstein , Damien Walker , Priyambada Mitra , Ali Vahidsafa , Matthew Cohen , Josephus Ebergen , Andrew Brock
IPC: G06F12/00 , G06F12/0817 , G06F12/128 , G06F12/0813
Abstract: A cache coherence system manages both internode and intranode cache coherence in a cluster of nodes. Each node in the cluster of nodes is either a collection of processors running an intranode coherence protocol between themselves, or a single processor. A node comprises a plurality of coherence ordering units (COUs) that are hardware circuits configured to manage intranode coherence of caches within the node and/or internode coherence with caches on other nodes in the cluster. Each node contains one or more directories which tracks the state of cache line entries managed by the particular node. Each node may also contain one or more scoreboards for managing the status of ongoing transactions. The internode cache coherence protocol implemented in the COUs may be used to detect and resolve communications errors, such as dropped message packets between nodes, late message delivery at a node, or node failure. Additionally, a transport layer manages communication between the nodes in the cluster, and can additionally be used to detect and resolve communications errors.
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公开(公告)号：US20190079795A1
公开(公告)日：2019-03-14
申请号：US15699027
申请日：2017-09-08
Applicant: Oracle International Corporation
Inventor： John R. Feehrer , Milton Shih , Matthew Cohen , Kenneth Chan , Ramaswamy Sivaramakrishnan , Julia Harper , Peter Dunlap
Abstract: A method and system for processing data are disclosed. A processor, in response to executing a software program, may write an entry in a work queue. The entry may include an operation, and a location of data stored in an input buffer, and a location in an output buffer to write processed data. The processor may also generate a notification that at least one entry in the work queue is ready to be processed. The data transformation unit may assign the entry to a data transformation circuit, and retrieve the data from the input buffer using the location. The data transformation unit may also perform to the operation on the retrieved data to generate updated data, generate a completion message in response to completion of the operation, and store the updated data in an output buffer. An interface unit may relay transactions between the processor and the data transformation unit.
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公开(公告)号：US10853303B2
公开(公告)日：2020-12-01
申请号：US14944835
申请日：2015-11-18
Applicant: Oracle International Corporation
Inventor： John R. Feehrer , Matthew Cohen , Rahoul Puri , John Johnson , Alan Adamson , Julia Harper
Abstract: An apparatus and method for controlling a virtualized endpoint device are disclosed. A processor may be configured to execute instructions included in multiple execution threads. A first device may be configured to perform multiple command and data functions, and a communication unit may include a first port coupled to the first device via a first link and be configured to send instructions from the processor to the first device via the first link using a first communication protocol. The processor may be further configured to execute first and second sets of commands included in respective execution threads. The first set of commands may be associated with the plurality of command functions and the second set of commands may be associated with the plurality of data functions.
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公开(公告)号：US20170139873A1
公开(公告)日：2017-05-18
申请号：US14944835
申请日：2015-11-18
Applicant: Oracle International Corporation
Inventor： John R. Feehrer , Matthew Cohen , Rahoul Puri , John Johnson , Alan Adamson , Julia Harper
CPC classification number: G06F13/4286 , G06F9/455 , G06F9/45545 , G06F13/102 , G06F13/4022
Abstract: An apparatus and method for controlling a virtualized endpoint device are disclosed. A processor may be configured to execute instructions included in multiple execution threads. A first device may be configured to perform multiple command and data functions, and a communication unit may include a first port coupled to the first device via a first link and be configured to send instructions from the processor to the first device via the first link using a first communication protocol. The processor may be further configured to execute first and second sets of commands included in respective execution threads. The first set of commands may be associated with the plurality of command functions and the second set of commands may be associated with the plurality of data functions.
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Patent Agency Ranking
公开(公告)号：US10963295B2
公开(公告)日：2021-03-30
申请号：US15699027
申请日：2017-09-08
Applicant: Oracle International Corporation
Inventor： John R. Feehrer , Milton Shih , Matthew Cohen , Kenneth Chan , Ramaswamy Sivaramakrishnan , Julia Harper , Peter Dunlap
Abstract: A method and system for processing data are disclosed. A processor, in response to executing a software program, may write an entry in a work queue. The entry may include an operation, and a location of data stored in an input buffer, and a location in an output buffer to write processed data. The processor may also generate a notification that at least one entry in the work queue is ready to be processed. The data transformation unit may assign the entry to a data transformation circuit, and retrieve the data from the input buffer using the location. The data transformation unit may also perform to the operation on the retrieved data to generate updated data, generate a completion message in response to completion of the operation, and store the updated data in an output buffer. An interface unit may relay transactions between the processor and the data transformation unit.
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公开(公告)号：US10817456B2
公开(公告)日：2020-10-27
申请号：US15629293
申请日：2017-06-21
Applicant: Oracle International Corporation
Inventor： John R. Feehrer , Matthew Cohen , Rahoul Puri , Tayfun Kocaoglu , John Johnson , David Kahn , Alan Adamson , Sriram Jayakumar , Julia Harper , Robert G. Sheldon , Mark Kanda , Aruna Jayakumar
Abstract: An apparatus and method for controlling a device with shared hardware resources to provide separate execution environments for control and data functions are disclosed. A processor may be configured to generate a first request to access control functions of the device in response to execution of a first thread, and generate a second request to access data functions of the device in response to execution of a second thread. A communication unit may send first indicative of the first request and second data indicative of the second request to the device via first and second ports, respectively.
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公开(公告)号：US20170139721A1
公开(公告)日：2017-05-18
申请号：US14944893
申请日：2015-11-18
Applicant: Oracle International Corporation
Inventor： John R. Feehrer , Sriram Jayakumar , Rahoul Puri , Matthew Cohen , Julia Harper , Alan Adamson , John Johnson
CPC classification number: G06F9/4418 , G06F13/20
Abstract: An apparatus and method for resetting a virtualized device are disclosed. The virtualized device may be coupled to a first port on a communication unit via a first link. The first port may send one or more instructions to the virtualized device via the first link using a first communication protocol. A processor may be configured to detect a reset condition for the virtualized device. In response to the detection of the reset condition for the virtualized device, the first port may disregard one or more transaction requests made by the virtualized device. The first port may further send an error message to the processor in response to receiving a Programmed Input/Output (PIO) request from the processor after the detection of the reset condition.
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公开(公告)号：US10296356B2
公开(公告)日：2019-05-21
申请号：US14944893
申请日：2015-11-18
Applicant: Oracle International Corporation
Inventor： John R. Feehrer , Sriram Jayakumar , Rahoul Puri , Matthew Cohen , Julia Harper , Alan Adamson , John Johnson
IPC: G06F11/00 , G06F9/4401 , G06F13/20
Abstract: An apparatus and method for resetting a virtualized device are disclosed. The virtualized device may be coupled to a first port on a communication unit via a first link. The first port may send one or more instructions to the virtualized device via the first link using a first communication protocol. A processor may be configured to detect a reset condition for the virtualized device. In response to the detection of the reset condition for the virtualized device, the first port may disregard one or more transaction requests made by the virtualized device. The first port may further send an error message to the processor in response to receiving a Programmed Input/Output (PIO) request from the processor after the detection of the reset condition.
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公开(公告)号：US20170286354A1
公开(公告)日：2017-10-05
申请号：US15629293
申请日：2017-06-21
Applicant: Oracle International Corporation
Inventor： John R. Feehrer , Matthew Cohen , Rahoul Puri , Tayfun Kocaoglu , John Johnson , David Kahn , Alan Adamson , Sriram Jayakumar , Julia Harper , Robert G. Sheldon , Mark Kanda
Abstract: An apparatus and method for controlling a device with shared hardware resources to provide separate execution environments for control and data functions are disclosed. A processor may be configured to generate a first request to access control functions of the device in response to execution of a first thread, and generate a second request to access data functions of the device in response to execution of a second thread. A communication unit may send first indicative of the first request and second data indicative of the second request to the device via first and second ports, respectively.
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