摘要:
A programmable logic device includes a plurality of logic blocks organized into a cluster. Each logic block may be configured into a logic mode and a memory mode. The logic blocks are arranged into at least one cluster, each cluster having a data bus configured to provide data words to logic blocks within its cluster.
摘要:
A memory provides a programmable write port data width and an independently programmable read port data width. The independence between the programmable write port data width and the programmable read port data width is achieved without the use of a third clock domain.
摘要:
A photon-counting Geiger-mode avalanche photodiode intensity imaging array includes an array of pixels, each having an avalanche photodiode. A pixel senses an avalanche event and stores, in response to the sensed avalanche event, a single bit digital value therein. An array of accumulators are provided such that each accumulator is associated with a pixel. A row decoder circuit addresses a pixel row within the array of pixels. A bit sensing circuit converts a precharged capacitance into a digital value during read operations.
摘要:
A process is provided for forming a building product having a color variation representative of a “natural” building material. The process includes feeding a first amount of a first material and a second amount of a second material to an extruder, mixing at least a portion of the first amount with at least a portion of the second amount in the extruder to form a third material, and extruding the third material from the extruder to form a product from the extruded third material. The formed product has a color variation representative of a “natural” building material such as ceramic, clay, wood, slate, stone, brick, concrete, metal, etc. The first material is formed of a first fiber, a first resin, and a first colorant. The second material is formed of a second fiber, a second resin, and a second colorant, wherein the second colorant is different than the first colorant.
摘要:
A circuit for providing programmable voltage output levels in a logic device includes a pull-up device for driving an output pad with either a first voltage output level or a second voltage output level. A charge pump generates a pumped voltage. A first clamp regulator, coupled to the charge pump and the pull-up device, receives a first reference signal. The first clamp regulator, in response to the first reference signal, generates a first voltage from which the first voltage output level is derived. A second clamp regulator, coupled to the pull-up device, receives a second reference signal. In response to the second reference signal, the second clamp regulator generates a second voltage from which the second voltage output level is derived. A passgate multiplexer is coupled to the first and second clamp regulators. The passgate multiplexer receives at least one output voltage select signal. In response to the at least one output voltage select signal the passgate multiplexer selects either the first voltage output level or the second voltage output level.
摘要:
A programmable integrated circuit device includes a plurality of output terminals, each output terminal for use in transmitting a respective output signal. Timing control circuitry is connected to the output terminals. The timing control circuitry is operable to delay the output signal on each output terminal and is further operable to control a slew rate of the output signal on each output terminal.