公开(公告)号：US10102323B2

公开(公告)日：2018-10-16

申请号：US15291459

申请日：2016-10-12

Applicant: ORACLE INTERNATIONAL CORPORATION

Inventor： Haowei Zhang ,  Xiaoying Shen ,  Sebastian Turullols

IPC: G06F17/50 ,  G06F17/11 ,  G06F17/16

Abstract: Embodiments include systems and methods for optimization of micro-benchmark analysis for microprocessor designs. For example, embodiments seek to generate a suite of micro-benchmarks and associated weighting factors, which can be used to effectively define a weighted aggregate workload condition for a fine-grained (e.g., RTL) simulation in a manner that is a sufficient proxy for predicted commercial workload conditions. The suite of micro-benchmarks can be appreciably more efficient to simulate than the commercial workload, so that using the suite of micro-benchmarks as a proxy for the commercial workload can provide many benefits, including more efficient iterative design.

公开(公告)号：US09721007B2

公开(公告)日：2017-08-01

申请号：US14508708

申请日：2014-10-07

Applicant: Oracle International Corporation

Inventor： Haowei Zhang ,  Xiaoying Shen

IPC: G06F17/30 ,  G06F7/32

CPC classification number: G06F17/30705 ,  G06F7/32 ,  G06F17/30312 ,  G06F17/30613 ,  G06F17/30979

Abstract: Techniques for high-performance parallel data sorting are provided. K, M, and N exceed 1. In a first phase, a plurality of unordered data elements to be sorted is divided into K unordered lists each preferably having approximately M elements. Each of these K unordered lists can be independently sorted in parallel using any algorithm, such as quicksort, to generate K ordered lists. In a second phase, N balanced workloads are determined from the K ordered lists by using an iterative converging process capped by a maximum number of iterations. Thus, any non-uniform or skewed data distribution can be load balanced with minimal processing time. Once the N balanced workloads are determined, they can be independently sorted in parallel, for example by using a merge sort, and then combined with a fast concatenation to provide the final sorted result. Thus, sorting operations are fully parallelized while avoiding expensive data scanning steps.

公开(公告)号：US20160098481A1

公开(公告)日：2016-04-07

申请号：US14508708

申请日：2014-10-07

Applicant: Oracle International Corporation

Inventor： Haowei Zhang ,  Xiaoying Shen

IPC: G06F17/30

CPC classification number: G06F17/30705 ,  G06F7/32 ,  G06F17/30312 ,  G06F17/30613 ,  G06F17/30979

Abstract: A method, apparatus, and system for improved high-performance parallel data sorting is provided. In a first phase, a plurality of unordered data elements to be sorted is divided into K unordered lists each preferably having approximately M elements. Each of these K unordered lists can be independently sorted in parallel using any algorithm, such as quicksort, to generate K ordered lists. In a second phase, N balanced workloads are determined from the K ordered lists by using an iterative converging process capped by a maximum number of iterations. Thus, any non-uniform or skewed data distribution can be load balanced with minimal processing time. Once the N balanced workloads are determined, they can be independently sorted in parallel, for example by using a merge sort, and then combined with a fast concatenation to provide the final sorted result. Thus, sorting operations are fully parallelized while avoiding any expensive data scanning steps.

Abstract translation: 提供了一种用于改进高性能并行数据排序的方法，装置和系统。 在第一阶段中，要排序的多个无序数据元素被划分为优选地具有大约M个元素的K个无序列表。 这些K个无序列表中的每一个可以使用诸如quicksort之类的任何算法来并行地独立排序以产生K个有序列表。 在第二阶段，通过使用由最大迭代次数限制的迭代收敛过程，从K个有序列表中确定N个平衡工作负载。 因此，任何不均匀或偏斜的数据分布可以以最少的处理时间负载平衡。 一旦确定了N个平衡工作负载，它们可以独立地并行排序，例如通过使用合并排序，然后结合快速连接来提供最终的排序结果。 因此，排序操作完全并行化，同时避免了任何昂贵的数据扫描步骤。

公开(公告)号：US20150347666A1

公开(公告)日：2015-12-03

申请号：US14293763

申请日：2014-06-02

Applicant: Oracle International Corporation

Inventor： Haowei Zhang ,  Xiaoying Shen ,  Sebastian Turullols

IPC: G06F17/50

CPC classification number: G06F17/5036 ,  G06F17/11 ,  G06F17/16 ,  G06F17/5009 ,  G06F17/5031 ,  G06F17/5081 ,  G06F2217/84 ,  G06F2217/86

Abstract: Embodiments include systems and methods for optimization of micro-benchmark analysis for microprocessor designs. For example, embodiments seek to generate a suite of micro-benchmarks and associated weighting factors, which can be used to effectively define a weighted aggregate workload condition for a fine-grained (e.g., RTL) simulation in a manner that is a sufficient proxy for predicted commercial workload conditions. The suite of micro-benchmarks can be appreciably more efficient to simulate than the commercial workload, so that using the suite of micro-benchmarks as a proxy for the commercial workload can provide many benefits, including more efficient iterative design.

Abstract translation: 实施例包括用于优化微处理器设计的微基准分析的系统和方法。 例如，实施例寻求生成一组微基准和相关联的加权因子，其可以用于以对于细粒度（例如，RTL）模拟）有效地定义加权聚合工作负载条件，其方式是足够的代理 预测商业工作量情况。 微型基准测试套件可以比商业工作量更高效地模拟，因此使用微型基准套件作为商业工作负载的代理可以提供许多好处，包括更有效的迭代设计。

公开(公告)号：US20170132344A1

公开(公告)日：2017-05-11

申请号：US15291459

申请日：2016-10-12

Applicant: ORACLE INTERNATIONAL CORPORATION

Inventor： Haowei Zhang ,  Xiaoying Shen ,  Sebastian Turullols

IPC: G06F17/50 ,  G06F17/16 ,  G06F17/11

CPC classification number: G06F17/5036 ,  G06F17/11 ,  G06F17/16 ,  G06F17/5009 ,  G06F17/5031 ,  G06F17/5081 ,  G06F2217/84 ,  G06F2217/86

Abstract: Embodiments include systems and methods for optimization of micro-benchmark analysis for microprocessor designs. For example, embodiments seek to generate a suite of micro-benchmarks and associated weighting factors, which can be used to effectively define a weighted aggregate workload condition for a fine-grained (e.g., RTL) simulation in a manner that is a sufficient proxy for predicted commercial workload conditions. The suite of micro-benchmarks can be appreciably more efficient to simulate than the commercial workload, so that using the suite of micro-benchmarks as a proxy for the commercial workload can provide many benefits, including more efficient iterative design.

公开(公告)号：US09483603B2

公开(公告)日：2016-11-01

申请号：US14293763

申请日：2014-06-02

Applicant: Oracle International Corporation

Inventor： Haowei Zhang ,  Xiaoying Shen ,  Sebastian Turullols

IPC: G06F17/50

CPC classification number: G06F17/5036 ,  G06F17/11 ,  G06F17/16 ,  G06F17/5009 ,  G06F17/5031 ,  G06F17/5081 ,  G06F2217/84 ,  G06F2217/86

Abstract: Embodiments include systems and methods for optimization of micro-benchmark analysis for microprocessor designs. For example, embodiments seek to generate a suite of micro-benchmarks and associated weighting factors, which can be used to effectively define a weighted aggregate workload condition for a fine-grained (e.g., RTL) simulation in a manner that is a sufficient proxy for predicted commercial workload conditions. The suite of micro-benchmarks can be appreciably more efficient to simulate than the commercial workload, so that using the suite of micro-benchmarks as a proxy for the commercial workload can provide many benefits, including more efficient iterative design.

Abstract translation: 实施例包括用于优化微处理器设计的微基准分析的系统和方法。 例如，实施例寻求生成一组微基准和相关联的加权因子，其可以用于以对于细粒度（例如，RTL）模拟）有效地定义加权聚合工作负载条件，其方式是足够的代理 预测商业工作量情况。 微型基准测试套件可以比商业工作量更高效地模拟，因此使用微型基准套件作为商业工作负载的代理可以提供许多好处，包括更有效的迭代设计。

公开(公告)号：US09710042B2

公开(公告)日：2017-07-18

申请号：US14461042

申请日：2014-08-15

Applicant: Oracle International Corporation

Inventor： Haowei Zhang ,  Xiaoying Shen ,  Sebastian Turullols ,  Robert T. Golla

IPC: G06F1/30 ,  G06F1/32 ,  G06F9/38

CPC classification number: G06F1/3206 ,  G06F1/3287 ,  G06F9/3869 ,  Y02D10/171

Abstract: Embodiments of the invention provide adaptive power ramp control (APRC) in microprocessors. One implementation of the APRC can compute a present core power and a present power ramp condition in the microprocessor, for example, to determine whether the present power is in a particular predefined control zone and whether the present power ramp is greater than a predefined threshold for that control zone. Those determinations can indicate a likelihood of an imminent, undesirable power ramp condition and can inform entry into a control mode. The APRC can generate an appropriate stall control signal in response to its present control mode, and the stall control signal can stall operation of at least one functional unit of the microprocessor according to a predefined stall pattern. This can effectively combat the imminent power ramp condition by reducing the power usage of the microprocessor.

公开(公告)号：US20150301832A1

公开(公告)日：2015-10-22

申请号：US14256347

申请日：2014-04-18

Applicant: Oracle International Corporation

Inventor： Haowei Zhang ,  Xiaoying Shen ,  Manish Shah

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/3861 ,  G06F9/3844 ,  G06F9/3851

Abstract: Embodiments for a processor that selectively enables and disables branch prediction are disclosed. The processor may include counters to track a number of fetched instructions, a number of branches, and a number of mispredicted branches. A misprediction threshold may be calculated dependent upon the tracked number of branches and a predefined misprediction ratio. Branch prediction may then be disabled when the number of mispredictions exceed the determined threshold value and dependent upon the branch rate.

Abstract translation: 公开了一种选择性启用和禁用分支预测的处理器的实施例。 处理器可以包括用于跟踪多个获取的指令的计数器，多个分支以及多个错误预测的分支。 取决于跟踪的分支数量和预定义的错误预测比率，可以计算误预测阈值。 然后，当错误预测的数量超过确定的阈值并且取决于分支速率时，分支预测可以被禁用。

公开(公告)号：US10001998B2

公开(公告)日：2018-06-19

申请号：US14256347

申请日：2014-04-18

Applicant: Oracle International Corporation

Inventor： Haowei Zhang ,  Xiaoying Shen ,  Manish Shah

IPC: G06F15/00 ,  G06F7/38 ,  G06F9/00 ,  G06F9/44 ,  G06F9/38

CPC classification number: G06F9/3861 ,  G06F9/3844 ,  G06F9/3851

Abstract: Embodiments for a processor that selectively enables and disables branch prediction are disclosed. The processor may include counters to track a number of fetched instructions, a number of branches, and a number of mispredicted branches. A misprediction threshold may be calculated dependent upon the tracked number of branches and a predefined misprediction ratio. Branch prediction may then be disabled when the number of mispredictions exceed the determined threshold value and dependent upon the branch rate.

公开(公告)号：US20160048187A1

公开(公告)日：2016-02-18

申请号：US14461042

申请日：2014-08-15

Applicant: Oracle International Corporation

Inventor： Haowei Zhang ,  Xiaoying Shen ,  Sebastian Turullols ,  Robert T. Golla

IPC: G06F1/32

CPC classification number: G06F1/3206 ,  G06F1/3287 ,  G06F9/3869 ,  Y02D10/171

Abstract: Embodiments of the invention provide adaptive power ramp control (APRC) in microprocessors. One implementation of the APRC can compute a present core power and a present power ramp condition in the microprocessor, for example, to determine whether the present power is in a particular predefined control zone and whether the present power ramp is greater than a predefined threshold for that control zone. Those determinations can indicate a likelihood of an imminent, undesirable power ramp condition and can inform entry into a control mode. The APRC can generate an appropriate stall control signal in response to its present control mode, and the stall control signal can stall operation of at least one functional unit of the microprocessor according to a predefined stall pattern. This can effectively combat the imminent power ramp condition by reducing the power usage of the microprocessor.

Abstract translation: 本发明的实施例在微处理器中提供自适应功率斜坡控制（APRC）。 APRC的一个实施方案可以计算微处理器中的当前核心功率和当前的功率斜坡状态，例如，以确定当前功率是否在特定的预定义控制区以及当前功率斜坡是否大于 那个控制区。 这些确定可以指示即将发生的不期望的功率斜坡状况的可能性，并且可以通知进入控制模式。 APRC可以响应于其当前控制模式而产生适当的失速控制信号，并且失速控制信号可以根据预定的失速模式停止微处理器的至少一个功能单元的操作。 这可以通过减少微处理器的功率消耗来有效地抵抗迫在眉睫的功率斜坡状况。