公开(公告)号：US20060166719A1

公开(公告)日：2006-07-27

申请号：US11339074

申请日：2006-01-24

申请人： Oren Arad ,  Gregory Johnson

发明人： Oren Arad ,  Gregory Johnson

IPC分类号： H04M1/00

CPC分类号： H01Q1/44 ,  H01Q1/242 ,  H01Q5/40 ,  H01Q9/16 ,  H01Q21/28 ,  H01Q21/30 ,  H04B1/20 ,  H04M1/05 ,  H04M1/6058

摘要： Systems for improving radio reception on a mobile device are provided. In exemplary embodiments, the system comprises a headset apparatus having a plurality of antenna elements. In exemplary embodiments, the plurality of antenna elements may be positioned in such a manner as to result in low-correlation between the plurality of antenna elements. For example, at least one of the antenna elements may be vertically oriented near a plug of the headset apparatus. Further antenna elements may be oriented vertically, horizontally, or both near an earpiece of the headset apparatus or above a juncture where a left and right cord of the headset apparatus splits. Exemplary embodiments may also comprise a receiving device configured to receive RF signals from the plurality of antenna elements and process these signals for playback on the headset apparatus.

摘要翻译： 提供了用于改善移动设备上的无线电接收的系统。 在示例性实施例中，该系统包括具有多个天线元件的耳机设备。 在示例性实施例中，多个天线元件可以以导致多个天线元件之间的低相关性的方式来定位。 例如，天线元件中的至少一个可以垂直地定向在耳机设备的插头附近。 另外的天线元件可以在耳机设备的耳机附近垂直，水平或两者定向，或者耳机设备的左和右线分开的接合处。 示例性实施例还可以包括被配置为从多个天线元件接收RF信号并且处理这些信号以在头戴式耳机上播放的接收装置。

公开(公告)号：US08675532B2

公开(公告)日：2014-03-18

申请号：US13191222

申请日：2011-07-26

申请人： Sridhar G. Sharma ,  Oren Arad

发明人： Sridhar G. Sharma ,  Oren Arad

IPC分类号： G08C17/00 ,  H04J3/00

CPC分类号： H04H20/426 ,  H04H20/42 ,  H04H20/72 ,  H04H2201/20

摘要： Systems and methods for providing a low power receiver device using fine grained time division are provided. In one embodiment, the receiver device comprises a tuner, a demodulator configured to demodulate at least one sampled signal, a payload processor configured to process at least one demodulated signal into an output format, and a time division control logic configured to generate a control signal to switch at least one component within the receiver device between modes to conserve power. The at least one component may be switched between an active mode, a standby mode, a power off mode, and a low power mode. In further embodiments, the at least one component may be switched between staggered modes.

摘要翻译： 提供了用于提供使用细粒度时间分割的低功率接收机设备的系统和方法。 在一个实施例中，接收机设备包括调谐器，被配置为解调至少一个采样信号的解调器，配置成将至少一个解调信号处理为输出格式的有效载荷处理器，以及配置成产生控制信号的时分控制逻辑 在模式之间切换接收机设备内的至少一个组件以节​​省功率。 可以在活动模式，待机模式，关机模式和低功率模式之间切换至少一个组件。 在另外的实施例中，可以在交错模式之间切换至少一个部件。

公开(公告)号：US08489053B2

公开(公告)日：2013-07-16

申请号：US13007654

申请日：2011-01-16

申请人： David Peavey ,  Oren Arad

发明人： David Peavey ,  Oren Arad

IPC分类号： H04B1/06 ,  H04K3/00

CPC分类号： H03L7/07 ,  H03L7/0805

摘要： Digital logic circuitry is disclosed. The circuitry includes local oscillator drift and phase compensation logic that compensates the frequency drift and the phase noise of a local oscillator generated by a digitally controlled oscillator.

摘要翻译： 公开了数字逻辑电路。 电路包括本地振荡器漂移和相位补偿逻辑，用于补偿数字控制振荡器产生的本地振荡器的频率漂移和相位噪声。

公开(公告)号：US07990934B2

公开(公告)日：2011-08-02

申请号：US12815967

申请日：2010-06-15

申请人： Oren Arad ,  Sridhar G. Sharma

发明人： Oren Arad ,  Sridhar G. Sharma

IPC分类号： H04B7/212

CPC分类号： H04H20/426 ,  H04H20/42 ,  H04H20/72 ,  H04H2201/20

摘要： Systems and methods for providing a low power receiver device using fine grained time division are provided. In one embodiment, the receiver device comprises a tuner, a demodulator configured to demodulate at least one sampled signal, a payload processor configured to process at least one demodulated signal into an output format, and a time division control logic configured to generate a control signal to switch at least one component within the receiver device between modes to conserve power. The at least one component may be switched between an active mode, a standby mode, a power off mode, and a low power mode. In further embodiments, the at least one component may be switched between staggered modes.

摘要翻译： 提供了用于提供使用细粒度时间分割的低功率接收机设备的系统和方法。 在一个实施例中，接收机设备包括调谐器，被配置为解调至少一个采样信号的解调器，配置成将至少一个解调信号处理为输出格式的有效载荷处理器，以及配置成产生控制信号的时分控制逻辑 在模式之间切换接收机设备内的至少一个组件以节​​省功率。 可以在活动模式，待机模式，关机模式和低功率模式之间切换至少一个组件。 在另外的实施例中，可以在交错模式之间切换至少一个部件。

公开(公告)号：US20050009477A1

公开(公告)日：2005-01-13

申请号：US10618186

申请日：2003-07-10

申请人： Shlomo Rakib ,  Oren Arad ,  Robert Fanfelle

发明人： Shlomo Rakib ,  Oren Arad ,  Robert Fanfelle

IPC分类号： H01Q11/12 ,  H03D7/16 ,  H04B1/02 ,  H04B1/04 ,  H04B1/66 ,  H04H20060101 ,  H04L5/06 ,  H04L27/26

CPC分类号： H04L5/06 ,  H03D7/161 ,  H04L27/2637

摘要： A system for outputting a broadband signal outputs a number of input channel streams. The input channel streams first arrive at the system in a digital format. There the input channel streams are each directed to a modulator circuit. Each particular modulator circuit produces a digital upconverted signal for the associated channel streams. The outputs of the modulators are coupled to a summer circuit. Accordingly the summer circuit digitally sums the outputs of the modulator circuits. The summer circuit is coupled to a digital to analog converter (DAC). The DAC produces an analog signal from the digitally summed output of the summer circuit. The DAC is in turn coupled to an upconverter. The upconverter upconverts the analog output of the DAC into an output signal centered on a particular frequency.

摘要翻译： 用于输出宽带信号的系统输出多个输入通道流。 输入通道流首先以数字格式到达系统。 输入通道流分别指向调制器电路。 每个特定的调制器电路产生用于相关联的信道流的数字上变频信号。 调制器的输出耦合到加法电路。 因此，夏季电路将调制器电路的输出数字相加。 夏季电路耦合到数模转换器（DAC）。 DAC从夏季电路的数字相加输出产生模拟信号。 DAC又连接到上变频器。 上变频器将DAC的模拟输出上变频为以特定频率为中心的输出信号。

公开(公告)号：US08335484B1

公开(公告)日：2012-12-18

申请号：US11496767

申请日：2006-07-31

申请人： Oren Arad ,  Sridhar Sharma

发明人： Oren Arad ,  Sridhar Sharma

IPC分类号： H04B1/16

CPC分类号： H04B1/0003 ,  H03G3/3078

摘要： Systems and methods for dynamically controlling an analog-to-digital converter (ADC) in order to conserve power are provided. In exemplary embodiments, a receiver device comprises a tuner configured to receive a signal, at least one programmable analog-to-digital converter (ADC), and a digital signal processing hardware comprising a control logic. The exemplary control logic is configured to generate a control signal to configure components within the receiver device to conserve power at the ADC.

摘要翻译： 提供了用于动态控制模数转换器（ADC）以节省功率的系统和方法。 在示例性实施例中，接收机设备包括被配置为接收信号的调谐器，至少一个可编程模数转换器（ADC）以及包括控制逻辑的数字信号处理硬件。 示例性控制逻辑被配置为产生控制信号以配置接收机设备内的组件以节省ADC处的功率。

公开(公告)号：US20120020268A1

公开(公告)日：2012-01-26

申请号：US13195133

申请日：2011-08-01

申请人： Sridhar G. Sharma ,  Oren Arad

发明人： Sridhar G. Sharma ,  Oren Arad

IPC分类号： H04W52/02

CPC分类号： H04H20/426 ,  H04H20/42 ,  H04H20/72 ,  H04H2201/20

摘要： Systems and methods for providing a low power receiver device using fine grained time division are provided. In one embodiment, the receiver device comprises a tuner, a demodulator configured to demodulate at least one sampled signal, a payload processor configured to process at least one demodulated signal into an output format, and a time division control logic configured to generate a control signal to switch at least one component within the receiver device between modes to conserve power. The at least one component may be switched between an active mode, a standby mode, a power off mode, and a low power mode. In further embodiments, the at least one component may be switched between staggered modes.

公开(公告)号：US20100330900A1

公开(公告)日：2010-12-30

申请号：US12773835

申请日：2010-05-04

申请人： Oren Arad

发明人： Oren Arad

IPC分类号： H04H40/00 ,  H04B1/18

CPC分类号： H04H60/73 ,  H04H20/30

摘要： For each audio and data service, a table of contents (TOC) specifies which logical channel may carry data. The TOC may be transmitted over the NRSC-5 transmission system using a pre-defined protocol, which is received and decoded at an NRSC-5 receiver apparatus that extracts the TOC. When a user or an application requests a specific service from the receiver, the receiver logic may examine the TOC and may identify which LC may carry the requested service data. The receiver may only decode the LCs that are needed for the requested service, and may not decode other unneeded LCs thereby conserving power and memory.

摘要翻译： 对于每个音频和数据服务，目录（TOC）指定哪个逻辑信道可以携带数据。 TOC可以使用预定义协议在NRSC-5传输系统上传输，该预定义协议在提取TOC的NRSC-5接收机设备处被接收和解码。 当用户或应用程序从接收器请求特定服务时，接收器逻辑可以检查TOC并且可以识别哪个LC可以携带所请求的服务数据。 接收机可以仅解码所请求的服务所需的LC，并且可能不解码其它不需要的LC，从而节省功率和存储器。

公开(公告)号：US07206357B2

公开(公告)日：2007-04-17

申请号：US10701978

申请日：2003-11-04

申请人： Shlomo Rakib ,  Oren Arad ,  Robert Fanfelle

发明人： Shlomo Rakib ,  Oren Arad ,  Robert Fanfelle

IPC分类号： H03K7/06 ,  H04L27/12

CPC分类号： H04L27/364 ,  H03C3/40 ,  H04L2027/0016 ,  H04L2027/0018

摘要： A signal transmitter for sending a radio signal is made up of an input for receiving input data and a first circuit for generating an inphase signal and a quadrature signal from the input data. A second circuit produces a first signal associated with a cosine of a first frequency and a third circuit that produces a second signal associated with a sine of the first frequency. A first modulator, coupled to the first circuit and the second circuit, upconverts the inphase signal with the first signal and produces a first upconverted signal. A second modulator, coupled to the first circuit and the third circuit, upconverts the inphase signal with the second signal and produces a second upconverted signal. A third modulator, coupled to the first circuit and the second circuit, upconverts the quadrature signal with the first signal and produces a third upconverted signal. A fourth modulator, coupled to the first circuit and the third circuit, upconverts the quadrature signal with the second signal and produces a fourth upconverted signal. A fourth circuit, coupled to the first and fourth modulators, combines the first upconverted signal and the fourth upconverted signal into a first intermediate signal. A fifth circuit, coupled to the second and third modulators, combines an inverse of the second upconverted signal and the third upconverted signal into a second intermediate signal. A quadrature modulator, coupled to the fourth circuit and the fifth circuit, converts the first intermediate signal and the second intermediate signal to an output signal. The output signal has a component at a first sideband of a second frequency, the first sideband frequency offset from the second frequency by a first amount. A filter, coupled to the quadrature modulator, passes the first sideband, and filters the second frequency and a second sideband, the second sideband offset from the second frequency by the inverse of the first amount.

公开(公告)号：US20060215590A1

公开(公告)日：2006-09-28

申请号：US11389277

申请日：2006-03-24

申请人： Sridhar Sharma ,  Oren Arad

发明人： Sridhar Sharma ,  Oren Arad

IPC分类号： G08C17/00

CPC分类号： H04H20/426 ,  H04H20/42 ,  H04H20/72 ,  H04H2201/20

摘要： Systems and methods for providing a low power receiver device using fine grained time division are provided. In one embodiment, the receiver device comprises a tuner, a demodulator configured to demodulate at least one sampled signal, a payload processor configured to process at least one demodulated signal into an output format, and a time division control logic configured to generate a control signal to switch at least one component within the receiver device between modes to conserve power. The at least one component may be switched between an active mode, a standby mode, a power off mode, and a low power mode. In further embodiments, the at least one component may be switched between staggered modes.