公开(公告)号：US3568070A

公开(公告)日：1971-03-02

申请号：US3568070D

申请日：1968-04-05

Applicant: PHILIPS CORP

Inventor： KAPS GERHARD ,  KUNERT HEINZ-PETER

IPC: H03K23/58 ,  A61J15/00 ,  G06F7/68 ,  H03K3/78 ,  H03K23/00 ,  H03K23/64 ,  H03K23/66 ,  H03K21/16

CPC classification number: H03K23/66 ,  G06F7/68 ,  H03K3/78

Abstract: A frequency divider operating in cascaded decades with selection switches adjustable for selecting from each decade the desired control signal and a gating network for combining the outputs of the respective decade switches for producing a time uniform divided pulse sequence.

公开(公告)号：US3566279A

公开(公告)日：1971-02-23

申请号：US3566279D

申请日：1968-04-12

Applicant: PHILIPS CORP

Inventor： KAPS GERHARD

IPC: G06F7/68 ,  H03K3/78 ,  H03K5/156 ,  H03K21/16

CPC classification number: H03K5/156 ,  G06F7/68 ,  H03K3/78

Abstract: A FREQUENCY DIVIDER FOR PROVIDING DESIRED SEQUENCES OF PULSES FROM A SERIES OF INPUT PULSES BY DECADE SELECTION SWITCHES PROVIDING THE DESIRED CONTROL SEQUENCE AND THE SEQUENCE INCREASED BY ONE AND A GATING CIRCUIT RESPONSIVE TO EACH CONTROL SEQUENCE AND CONTROL SEQUENCE INCREASED BY ONE FOR COMBINING EACH OF THE SEQUENCES INTO A SINGLE DESIRED FREQUENCY OUTPUT.

公开(公告)号：US3471790A

公开(公告)日：1969-10-07

申请号：US3471790D

申请日：1966-04-13

Applicant: PHILIPS CORP

Inventor： KAPS GERHARD

IPC: H03K3/027 ,  H03K5/13 ,  H03K5/135 ,  H03K3/04 ,  H03K17/28

CPC classification number: H03K5/13 ,  H03K3/027 ,  H03K5/135

Abstract: 1,095,944. Synchronizing devices. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. April 20, 1966 [April 23, 1965], No. 17323/66. Heading G4H. To synchronize input pulses at terminal E with clock pulses fed to a tri-stable device D, each input pulse is fed to the second stage of the device D so that on the occurrence of a clock pulse the second stage output is enabled to apply an enabling signal to AND gate G which passes a signal to the first stage when the input pulse terminates. When the next clock pulse occurs the first stage output is enabled to pass a pulse to terminal a and also to the third stage of the device D so that the system is returned to its rest position by the following clock pulse.

公开(公告)号：US3576532A

公开(公告)日：1971-04-27

申请号：US3576532D

申请日：1967-06-15

Applicant: PHILIPS CORP

Inventor： KAPS GERHARD

IPC: G05D11/13 ,  G01R23/10 ,  H03D13/00

CPC classification number: G05D11/132

Abstract: A ratio circuit for providing fine ratio control between a measured value and a desired value at a predetermined instant is provided with a comparison counter accumulating a measured value, and a plurality of selection devices each preset to a fractional proportion of the desired value. The presetting devices are driven by a common pulse source, all but the first presetting device coupled to the source via a frequency divider.

公开(公告)号：US3448251A

公开(公告)日：1969-06-03

申请号：US3448251D

申请日：1965-10-08

Applicant: PHILIPS CORP

Inventor： KAPS GERHARD ,  SCHOTT WINFRIED

IPC: B07C5/08 ,  G01D1/14 ,  G01R29/02 ,  G06F7/62 ,  G06F7/68 ,  H03K21/00 ,  H03K23/00 ,  H03K23/66 ,  G06G7/14

CPC classification number: H03K23/667 ,  B07C5/08 ,  G01D1/14 ,  G01R29/02 ,  G06F7/62 ,  G06F7/68 ,  H03K21/00 ,  H03K23/00

公开(公告)号：US3534336A

公开(公告)日：1970-10-13

申请号：US62792767

申请日：1967-04-03

Applicant: PHILIPS CORP

Inventor： KAPS GERHARD

IPC: G05D11/13 ,  H03K21/02 ,  G06F9/00

CPC classification number: H03K21/02 ,  G05D11/13

公开(公告)号：US3529246A

公开(公告)日：1970-09-15

申请号：US3529246D

申请日：1966-04-20

Applicant: PHILIPS CORP

Inventor： KAPS GERHARD ,  SCHOTT WINFRIED

IPC: G05D11/13 ,  H03K21/02 ,  H03B3/02 ,  H03B3/04

CPC classification number: H03K21/02