公开(公告)号：US3477040A

公开(公告)日：1969-11-04

申请号：US3477040D

申请日：1967-09-11

Applicant: PHILIPS CORP

Inventor： MEYER DIETRICH

IPC: H03B1/00 ,  H03B5/20 ,  H03B5/22 ,  H03B23/00 ,  H03C3/36 ,  H03B5/26

CPC classification number: H03C3/36 ,  H03B5/20 ,  H03B5/22 ,  H03B23/00 ,  H03B2200/0092 ,  H03B2201/02

公开(公告)号：US3479582A

公开(公告)日：1969-11-18

申请号：US3479582D

申请日：1967-11-03

Applicant: PHILIPS CORP

Inventor： MEYER DIETRICH

IPC: G01B7/00 ,  G01B7/14 ,  G01D5/22 ,  G01R33/02

CPC classification number: G01B7/003 ,  G01B7/14 ,  G01D5/2216

公开(公告)号：US3491311A

公开(公告)日：1970-01-20

申请号：US3491311D

申请日：1969-02-24

Applicant: PHILIPS CORP

Inventor： MEYER DIETRICH ,  SCHOTT WINFRIED

IPC: H03B1/00 ,  H03B5/20 ,  H03B5/26

CPC classification number: H03B5/26 ,  H03B5/20 ,  H03B2200/0092 ,  H03B2201/0208 ,  H03B2201/0216

公开(公告)号：US3614598A

公开(公告)日：1971-10-19

申请号：US3614598D

申请日：1970-05-13

Applicant: PHILIPS CORP

Inventor： MEYER DIETRICH

IPC: H03C3/08 ,  G01R17/14

CPC classification number: H03C3/08

Abstract: By connecting two resistors in parallel with one of the arms of a bridge circuit, for example a strain-gauge bridge, and by injecting a compensating current into the junction point of these resistors from a voltage source through a variable resistor, the bridge unbalance to be measured is compensated. For this purpose null amplifier which controls the variable resistor is connected to the measuring diagonal arm of the bridge. A small resistance variation in the bridge is converted, with a high degree of accuracy, into a large admittance variation which can be measured at the supply terminal of the variable resistor.

公开(公告)号：US3588473A

公开(公告)日：1971-06-28

申请号：US3588473D

申请日：1968-02-05

Applicant: PHILIPS CORP

Inventor： MEYER DIETRICH

IPC: G01R23/00 ,  G01R23/10 ,  G01R27/12 ,  G06F7/68 ,  G06G7/161 ,  G06J1/00 ,  G06F7/39

CPC classification number: G06J1/00 ,  G01R23/00 ,  G01R23/10 ,  G01R27/12 ,  G06F7/68 ,  G06G7/161

Abstract: IN A CIRCUIT FOR PRODUCING AN OUTPUT PROPORTIONAL TO THE QUOTIENT OF THE FREQUENCIES OF TWO INPUT SIGNALS, THE LOWER FREQUENCY SIGNAL IS APPLIED DIRECTLY TO AN INPUT OF ONE GATE AND TO AN INPUT OF A FLIP-FLOP. THE LOWER FREQUENCY SIGNAL IS ALSO APPLIED BY WAY OF A DELAY CIRCUIT TO THE INPUT OF ANOTHER GATE AND THE OTHER INPUT OF THE FLIP-FLOP. THE TWO OUTPUTS OF THE FLIP-FLOP ARE APPLIED TO THE OTHER INPUTS OF THE TWO GATES, AND THE OUTPUTS OF THE GATES ARE APPLIED TO A DIFFERENCE COUNTER. THE DELAY CIRCUIT PROVIDES A DELAY RELATED TO THE HIGHER FREQUENCY SIGNAL. THE CIRCUIT MAY BE PROVIDED WITH OUTPUTS FOR PERMITTING CASCADE CONNECTIONS IN ORDER TO OBTAIN ADDITIONAL INTEGERS OF THE QUOTIENT.