公开(公告)号：US09876977B2

公开(公告)日：2018-01-23

申请号：US15196042

申请日：2016-06-29

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Norihiko Sumitani ,  Hidenari Kanehara ,  Takayuki Nishitani

IPC: H04N5/378 ,  H04N5/374

CPC classification number: H04N5/378 ,  H04N5/374 ,  H04N5/3742

Abstract: A solid-state imaging device includes a plurality of pixels arrayed in a matrix, a plurality of first latch circuits, a first read bit line, a plurality of first driver circuits, a first amplifier, a second latch circuit, a second driver circuit, and a column scanning circuit. Each of the plurality of first latch circuits holds first pixel data which is obtained from a pixel located on the corresponding unit column. Each of the plurality of first driver circuits outputs the first pixel data, which is held in a corresponding one of the first latch circuits, to the first read bit line. The first amplifier amplifies a voltage of the first read bit line to generate first data. The second latch circuit holds the first data. The column scanning circuit sequentially outputs a plurality of the first pixel data by sequentially selecting the plurality of first driver circuits and selecting the second driver circuit. The second driver circuit outputs the first data to a read bit line different from the first read bit line.

公开(公告)号：US10931908B2

公开(公告)日：2021-02-23

申请号：US16491123

申请日：2018-02-27

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yutaka Abe ,  Kazuko Nishimura ,  Hiroshi Fujinaka ,  Norihiko Sumitani ,  Yosuke Higashi

IPC: H03K5/24 ,  H01L27/30 ,  H04N5/378 ,  H03F3/45 ,  H03K3/356 ,  H03M1/38 ,  H03M1/56

Abstract: A solid-state imaging device includes a first A/D converter circuit and a second A/D converter circuit per column. The first A/D converter circuit performs a first A/D conversion that (i) refines, using a first comparator, a range including a potential of an analog signal through a binary search, and (ii) generates, based on a result of the binary search, a first digital signal being a high-order portion of the digital signal. The second A/D converter circuit performs a second A/D conversion that generates a second digital signal being a low-order portion that is a remainder of the digital signal by measuring a time required for an output of the second comparator to be inverted, the second comparator comparing a quantitative relationship between the analog signal refined and a ramp signal.