公开(公告)号：US08399291B2

公开(公告)日：2013-03-19

申请号：US11169518

申请日：2005-06-29

申请人： Patricia A Brusso ,  Mitul B Modi ,  Carolyn R. McCormick ,  Ruben Cadena ,  Sankara J Subramanian ,  Edward L. Martin

发明人： Patricia A Brusso ,  Mitul B Modi ,  Carolyn R. McCormick ,  Ruben Cadena ,  Sankara J Subramanian ,  Edward L. Martin

IPC分类号： H01L21/00

CPC分类号： H05K1/115 ,  G06F1/16 ,  H01L24/81 ,  H01L24/90 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/90 ,  H01L2924/14 ,  H01L2924/3511 ,  H05K3/305 ,  H05K3/3436 ,  H05K2201/10378 ,  H05K2203/1105 ,  Y02P70/613 ,  H01L2924/00

摘要： An underfill device and method have been are provided. Advantages of devices and methods shown include dissipation of stresses at an interface between components such as a chip package and an adjacent circuit board. Another advantage includes faster manufacturing time and ease of manufacture using underfill devices and methods shown. An underfill assembly can be pre made with conductive structures included within the underfill assembly. Steps such as flowing epoxy and curing can be eliminated or performed concurrently with other manufacturing steps.

摘要翻译： 提供了底部填充装置和方法。 显示的装置和方法的优点包括在诸如芯片封装和相邻电路板的部件之间的界面处的应力耗散。 另一个优势包括加快制造时间和使用底部填充装置的制造方便以及所示的方法。 底部填充组件可以预先制成包含在底部填充组件内的导电结构。 步骤如流动的环氧树脂和固化可以消除或与其他制造步骤同时进行。