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公开(公告)号：US06925529B2
公开(公告)日：2005-08-02
申请号：US09903721
申请日：2001-07-12
申请人： Patrick J. Bohrer , Elmootazbellah N. Elnozahy , Charles R. Lefurgy , Ramakrishnan Rajamony , Bruce A. Smith
发明人： Patrick J. Bohrer , Elmootazbellah N. Elnozahy , Charles R. Lefurgy , Ramakrishnan Rajamony , Bruce A. Smith
CPC分类号： G06F3/0634 , G06F1/3221 , G06F1/3268 , G06F3/0625 , G06F3/0689 , Y02D10/154
摘要： A method and a computer usable medium including a program for operating disks having units, comprising: providing a first tier of at least one disk, the first tier storing at least one popular unit, providing a second tier of at least one disk, the second tier storing at least one unpopular unit, powering on at least one first tier disk, powering down the second tier, determining whether a request for a unit requires processing on the first tier or second tier, accessing the requested unit if the requested unit requires processing on the first tier, and powering on a second tier disk to copy the requested unit from the second tier disk to a first tier disk, if the requested unit is stored on the second tier.
摘要翻译： 一种包括用于操作具有单元的盘的程序的方法和计算机可用介质，包括：提供至少一个盘的第一层，所述第一层存储至少一个流行单元，提供至少一个盘的第二层，所述第二层 存储至少一个不受欢迎的单元，为至少一个第一层磁盘供电;关闭第二层的电源;确定对单元的请求是否需要对第一层或第二层进行处理，如果请求的单元需要处理，则访问所请求的单元 如果所请求的单元存储在第二层上，则启动第二层磁盘以将请求的单元从第二层磁盘复制到第一层磁盘。
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公开(公告)号：US06985952B2
公开(公告)日：2006-01-10
申请号：US10001742
申请日：2001-10-31
申请人： Patrick J. Bohrer , Elmootazbellah N. Elnozahy , Thomas W. Keller , Michael D. Kistler , Freeman L. Rawson, III
发明人： Patrick J. Bohrer , Elmootazbellah N. Elnozahy , Thomas W. Keller , Michael D. Kistler , Freeman L. Rawson, III
IPC分类号： G06F15/16
CPC分类号： G06F9/5061 , G06F9/5094 , G06F2209/5014 , H04L29/06 , Y02D10/22 , Y02D10/36
摘要： Cluster systems having central processor units (CPUs) with multiple processors (MPs) are configured as high density servers. Power density is managed within the cluster systems by assigning a utilization to persistent states and connections within the cluster systems. If a request to reduce overall power consumption within the cluster system is received, persistent states and connections are moved (migrated) within the multiple processors based on their utilization to balance power dissipation within the cluster systems. If persistent connections and states, that must be maintained have a low rate of reference, they may be maintained in processors that are set to a standby mode where memory states are maintained. In this way the requirement to maintain persistent connections and states does not interfere with an overall strategy of managing power within the cluster systems.
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公开(公告)号：US08762126B2
公开(公告)日：2014-06-24
申请号：US12984704
申请日：2011-01-05
CPC分类号： G06F11/3636 , G06F11/3648
摘要： Analyzing simulated operation of a computer including loading user-defined dynamically linked analysis libraries that each include specifications of events to be traced for analysis, including: executing, in separate hardware threads, one trace buffer handler for each analysis library, and associating, with each trace buffer handler, one or more analysis functions; translating static binary instructions for the simulated computer into binary instructions for the executing computer, including: inserting, into the translation, implementing code for each specification of an event to be traced and inserting, into the translation for each static instruction, a memory address of a separate static instruction buffer; executing the translation, including executing the implementing code and generating, in a trace buffer, one or more trace records for each specified event; and processing the trace buffer, including calling analysis functions and associating by the analysis functions through the separate static instruction buffers event analysis data with static instructions.
摘要翻译： 分析计算机的模拟操作，包括加载用户定义的动态链接分析库，每个分析库都包含要跟踪的事件的规范用于分析，包括：在单独的硬件线程中执行每个分析库的一个跟踪缓冲区处理程序，并将其与每个 跟踪缓冲处理程序，一个或多个分析函数; 将用于所述仿真计算机的静态二进制指令转换成用于所述执行计算机的二进制指令，所述二进制指令包括：将要跟踪的每个事件的每个指定的代码插入到所述转换中，并将每个静态指令的转换插入到所述静态指令的存储器地址 一个单独的静态指令缓冲区; 执行翻译，包括执行实现代码，并在跟踪缓冲器中生成每个指定事件的一个或多个跟踪记录; 并处理跟踪缓冲区，包括调用分析功能，并通过独立的静态指令缓冲区事件分析数据与静态指令通过分析功能进行关联。
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公开(公告)号：US08572628B2
公开(公告)日：2013-10-29
申请号：US12958980
申请日：2010-12-02
IPC分类号： G06F9/54
摘要： Inter-thread data communications in a computer processor with multiple hardware threads of execution, each hardware thread operatively coupled for communications through an inter-thread communications controller, where inter-thread communications is carried out by the inter-thread communications controller and includes: registering, responsive to one or more RECEIVE opcodes, one or more receiving threads executing the RECEIVE opcodes; receiving, from a SEND opcode of a sending thread, specifications of a number of derived messages to be sent to receiving threads and a base value; generating the derived messages, incrementing the base value once for each registered receiving thread so that each derived message includes a single integer as a separate increment of the base value; sending, to each registered receiving thread, a derived message; and returning, to the sending thread, an actual number of derived messages received by receiving threads.
摘要翻译： 具有多个执行硬件线程的计算机处理器中的线程间数据通信，每个硬件线程通过线程间通信控制器可操作地耦合用于通信，其中线程间通信由线程间通信控制器执行，并且包括：注册 响应于一个或多个RECEIVE操作码，执行所述RECEIVE操作码的一个或多个接收线程; 从发送线程的发送操作码接收要发送到接收线程的导出消息的数量和基本值的规范; 生成导出的消息，为每个注册的接收线程增加一次基本值，使得每个派生消息包括单个整数作为基本值的单独增量; 向每个注册的接收线程发送导出消息; 并且向发送线程返回由接收线程接收到的实际导出消息数。
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5.发明授权Creating a thread of execution in a computer processor without operating system intervention 失效在没有操作系统干预的情况下，在计算机处理器中创建执行线程公开(公告)号：US08561070B2
公开(公告)日：2013-10-15
申请号：US12959075
申请日：2010-12-02
IPC分类号： G06F9/46
CPC分类号： G06F9/4843
摘要： Creating a thread of execution in a computer processor includes an apparatus for copying data from a first set of registers to a second set of registers. The first set of registers is associated with a parent hardware thread and the second set of registers is associated with a child hardware thread. The copying is indicated by a hardware processor opcode called by a user-level process. The copying is performed with no operating system involvement. The child hardware thread is in a wait state. Creating the thread also includes changing, as indicated by the hardware processor opcode, the child hardware thread from the wait state to an ephemeral run state. The ephemeral run state indicates a lack of operating system support structures for the child hardware thread.
摘要翻译： 在计算机处理器中创建执行线程包括用于将数据从第一组寄存器复制到第二组寄存器的装置。 第一组寄存器与父硬件线程相关联，第二组寄存器与子硬件线程相关联。 复制由用户级进程调用的硬件处理器操作码指示。 在没有操作系统参与的情况下执行复制。 子硬件线程处于等待状态。 创建线程还包括如硬件处理器操作码所示，将子硬件线程从等待状态更改为临时运行状态。 短暂运行状态表示缺少子硬件线程的操作系统支持结构。
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公开(公告)号：US20120173928A1
公开(公告)日：2012-07-05
申请号：US12984704
申请日：2011-01-05
IPC分类号： G06F11/07
CPC分类号： G06F11/3636 , G06F11/3648
摘要： Analyzing simulated operation of a computer including loading user-defined dynamically linked analysis libraries that each include specifications of events to be traced for analysis, including: executing, in separate hardware threads, one trace buffer handler for each analysis library, and associating, with each trace buffer handler, one or more analysis functions; translating static binary instructions for the simulated computer into binary instructions for the executing computer, including: inserting, into the translation, implementing code for each specification of an event to be traced and inserting, into the translation for each static instruction, a memory address of a separate static instruction buffer; executing the translation, including executing the implementing code and generating, in a trace buffer, one or more trace records for each specified event; and processing the trace buffer, including calling analysis functions and associating by the analysis functions through the separate static instruction buffers event analysis data with static instructions.
摘要翻译： 分析计算机的模拟操作，包括加载用户定义的动态链接分析库，每个分析库都包含要跟踪的事件的规范用于分析，包括：在单独的硬件线程中执行每个分析库的一个跟踪缓冲区处理程序，并将其与每个 跟踪缓冲处理程序，一个或多个分析函数; 将用于所述仿真计算机的静态二进制指令转换成用于所述执行计算机的二进制指令，所述二进制指令包括：将要跟踪的每个事件的每个指定的代码插入到所述转换中，并将每个静态指令的转换插入到所述静态指令的存储器地址 一个单独的静态指令缓冲区; 执行翻译，包括执行实现代码，并在跟踪缓冲器中生成每个指定事件的一个或多个跟踪记录; 并处理跟踪缓冲区，包括调用分析功能，并通过独立的静态指令缓冲区事件分析数据与静态指令通过分析功能进行关联。
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公开(公告)号：US20120144395A1
公开(公告)日：2012-06-07
申请号：US12958980
申请日：2010-12-02
IPC分类号： G06F9/46
摘要： Inter-thread data communications in a computer processor with multiple hardware threads of execution, each hardware thread operatively coupled for communications through an inter-thread communications controller, where inter-thread communications is carried out by the inter-thread communications controller and includes: registering, responsive to one or more RECEIVE opcodes, one or more receiving threads executing the RECEIVE opcodes; receiving, from a SEND opcode of a sending thread, specifications of a number of derived messages to be sent to receiving threads and a base value; generating the derived messages, incrementing the base value once for each registered receiving thread so that each derived message includes a single integer as a separate increment of the base value; sending, to each registered receiving thread, a derived message; and returning, to the sending thread, an actual number of derived messages received by receiving threads.
摘要翻译： 具有多个执行硬件线程的计算机处理器中的线程间数据通信，每个硬件线程通过线程间通信控制器可操作地耦合用于通信，其中线程间通信由线程间通信控制器执行，并且包括：注册 响应于一个或多个RECEIVE操作码，执行所述RECEIVE操作码的一个或多个接收线程; 从发送线程的发送操作码接收要发送到接收线程的导出消息的数量和基本值的规范; 生成导出的消息，为每个注册的接收线程增加一次基本值，使得每个派生消息包括单个整数作为基本值的单独增量; 向每个注册的接收线程发送导出消息; 并且向发送线程返回由接收线程接收到的实际导出消息数。
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公开(公告)号：US09009716B2
公开(公告)日：2015-04-14
申请号：US13458781
申请日：2012-04-27
CPC分类号： G06F9/4843
摘要： Creating a thread of execution in a computer processor, including copying, as indicated by a hardware processor opcode having been specified by a user-level process, data from a first set of registers to a second set of registers, wherein the first set of registers is associated with a parent hardware thread, wherein the second set of registers is associated with a child hardware thread, wherein the child hardware thread is in a wait state, and changing, as indicated by the hardware processor opcode, the child hardware thread from the wait state to an ephemeral run state.
摘要翻译： 在计算机处理器中创建执行线程，包括由用户级过程指定的硬件处理器操作码所指示的复制，从第一组寄存器到第二组寄存器的数据，其中第一组寄存器 与父硬件线程相关联，其中所述第二组寄存器与子硬件线程相关联，其中所述子硬件线程处于等待状态，并且如硬件处理器操作码所指示的，从所述子硬件线程 等待状态到短暂的运行状态。
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公开(公告)号：US20120216204A1
公开(公告)日：2012-08-23
申请号：US13458781
申请日：2012-04-27
IPC分类号： G06F9/46
CPC分类号： G06F9/4843
摘要： Creating a thread of execution in a computer processor, including copying, by a hardware processor opcode called by a user-level process, with no operating system involvement, register contents from a parent hardware thread to a child hardware thread, the child hardware thread being in a wait state, and changing, by the hardware processor opcode, the child hardware thread from the wait state to an ephemeral run state.
摘要翻译： 在计算机处理器中创建执行线程，包括由没有操作系统参与的由用户级进程调用的硬件处理器操作码复制，将内容从父硬件线程注册到子硬件线程，子硬件线程为 处于等待状态，并且通过硬件处理器操作码将子硬件线程从等待状态改变为短暂运行状态。
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