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公开(公告)号：US08618787B1
公开(公告)日：2013-12-31
申请号：US12970285
申请日：2010-12-16
申请人： Patrick J. Quinn
发明人： Patrick J. Quinn
IPC分类号： G05F3/16
CPC分类号： H03F3/45179 , G05F3/262
摘要： A system for use within an integrated circuit (IC) can include an input differential pair including a positive input node and a negative input node, a current source coupled to the input differential pair, and a current mirror. The current mirror can include at least a first active device and a second active device. The system can include a biasing transistor device having a source terminal coupled to a gate terminal of each of the first and second active devices, a gate terminal coupled to a drain terminal of the second active device, and a drain terminal coupled to a voltage source. The biasing transistor device is complementary to the current mirror.
摘要翻译： 在集成电路（IC）中使用的系统可以包括输入差分对，其包括正输入节点和负输入节点，耦合到输入差分对的电流源和电流镜。 电流镜可以包括至少第一有源器件和第二有源器件。 该系统可以包括偏置晶体管器件，其具有耦合到第一和第二有源器件中的每一个的栅极端子的源极端子，耦合到第二有源器件的漏极端子的栅极端子和耦合到电压源的漏极端子 。 偏置晶体管器件与电流镜互补。
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公开(公告)号：US07235999B2
公开(公告)日：2007-06-26
申请号：US11590023
申请日：2006-10-31
IPC分类号： H03K19/003
CPC分类号： H03K19/17732 , G01R31/3167 , G01R31/318516
摘要： Method and apparatus for a system monitor embedded in a programmable logic device are described. The system monitor includes a dynamic reconfiguration port interface for configuring or reconfiguring the system monitor during operation thereof. The system monitor includes an analog-to-digital converter which is reconfigurable responsive to input via a dynamic reconfiguration port.
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3.发明授权Method and apparatus for providing high common-mode rejection ratio in a single-ended CMOS operational transconductance amplifier 有权在单端CMOS运算跨导放大器中提供高共模抑制比的方法和装置公开(公告)号：US07030697B1
公开(公告)日：2006-04-18
申请号：US10717344
申请日：2003-11-18
申请人： Maxim Pribytko , Patrick J. Quinn
发明人： Maxim Pribytko , Patrick J. Quinn
IPC分类号： H03F3/45
CPC分类号： H03F3/4569 , H03F3/45192 , H03F2203/45028
摘要： A method and apparatus for providing high common-mode rejection ratio (CMRR) in a single-ended CMOS operational transconductance amplifier is disclosed. A common-mode feedback boosts the OTA CMRR, while allowing integration of conventional OTA improvements.
摘要翻译： 公开了一种在单端CMOS运算跨导放大器中提供高共模抑制比（CMRR）的方法和装置。 共模反馈增强了OTA CMRR，同时允许集成传统的OTA改进。
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公开(公告)号：US06398750B1
公开(公告)日：2002-06-04
申请号：US09430007
申请日：1999-10-29
IPC分类号： A61F1300
CPC分类号： A61F5/0111
摘要： An ankle support (10) includes a first portion which is a boot-like member (11) A preconfigured figure 8 member comprising a first strap (40) and a second strap (50) is positioned around the boot-like member. An outer member (30) is secured to the boot-like member and forms a cover to hold the preconfigured figure 8 member in place to prevent misalignment of the straps (40 and 50).
摘要翻译： 脚踝支撑件（10）包括作为靴状构件（11）的第一部分。包括第一条带（40）和第二条带（50）的预配置图8构件围绕所述靴状构件定位。 外部构件（30）固定到靴状构件上并形成盖以将预配置的图8构件保持在适当位置，以防止带（40和50）的未对准。
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公开(公告)号：US5514997A
公开(公告)日：1996-05-07
申请号：US216987
申请日：1994-03-23
申请人： Patrick J. Quinn
发明人： Patrick J. Quinn
CPC分类号： H03H19/004
摘要： An inverting delay circuit including a differential amplifier (OTA) having a non-inverting input (+) coupled to ground, an inverting input (-) and an output; an input capacitor (Cin) which is coupled between an input of the inverting delay circuit and the inverting input (-) during a first switching phase (.phi.), and which is discharged during a second switching phase (); a feedback capacitor (Cx) which is coupled between the output and the inverting input (-) of the differential amplifier (OTA) during the first switching phase (.phi.), and between the inverting input (-) and ground during the second switching phase (); and an output capacitor (Co) which is coupled between the output and the inverting input (-) during the second switching phase (), the output capacitor (Co) being discharged during the first switching phase (.phi.), a charge on the feedback capacitor (Cx) being transferred to the output capacitor (Co) during the second switching phase ().
摘要翻译： 一种反相延迟电路，包括具有耦合到地的非反相输入（+）的差分放大器（OTA），反相输入（ - ）和输出; 输入电容器（Cin），其在第一开关阶段（phi）期间耦合在所述反相延迟电路的输入端和所述反相输入端（ - ）之间，并且在第二开关阶段期间被放电; 反馈电容器（Cx），其在第一开关阶段（phi）期间耦合在差分放大器（OTA）的输出和反相输入（ - ）之间，以及在第二开关阶段期间在反相输入（ - ）与地之间 （）; 以及在第二开关阶段（）期间耦合在输出和反相输入（ - ）之间的输出电容器（Co），输出电容器（Co）在第一开关阶段（phi）期间被放电，反馈电荷 在第二开关阶段（）期间，电容器（Cx）被传送到输出电容器（Co）。
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公开(公告)号：US08207592B2
公开(公告)日：2012-06-26
申请号：US12276296
申请日：2008-11-21
申请人： Patrick J. Quinn
发明人： Patrick J. Quinn
IPC分类号： H01L29/92
CPC分类号： H01L28/60 , H01G4/012 , H01G4/33 , H01L23/5223 , H01L27/0207 , H01L27/0805 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A capacitor in an integrated circuit (“IC”) has a first plurality of conductive crosses formed in a layer of the IC electrically connected to and forming a portion of a first node of the capacitor and a second plurality of conductive crosses formed in the metal layer of the IC. The conductive crosses in the second plurality of conductive crosses are electrically connected to and form a portion of a second node of the capacitor and capacitively couple to the first node.
摘要翻译： 集成电路（“IC”）中的电容器具有形成在IC的层中的第一多个导电十字形，其电连接并形成电容器的第一节点的一部分，并且形成在金属中的第二多个导电十字 IC层。 第二多个导电十字中的导电十字电连接到并形成电容器的第二节点的一部分并电容耦合到第一节点。
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公开(公告)号：US20120131760A1
公开(公告)日：2012-05-31
申请号：US13224040
申请日：2011-09-01
申请人： Jeffrey S. Louis , David Chaney , Harald Krondorfer , Ronald Rich , Robert A. Salo , Steven J. Paliobeis , Patrick J. Quinn , Kevin Vail
发明人： Jeffrey S. Louis , David Chaney , Harald Krondorfer , Ronald Rich , Robert A. Salo , Steven J. Paliobeis , Patrick J. Quinn , Kevin Vail
CPC分类号： A47L11/34 , A47L11/4016 , A47L11/4075 , A47L11/4091
摘要： An extractor cleaning machine includes a base having a distribution nozzle and a suction nozzle, a suction source in fluid communication with the suction nozzle, a recovery tank removably coupled to the base and having a recovery tank handle, an extractor handle pivotally coupled to the base, and a supply tank coupled to the extractor handle for pivotal movement with the extractor handle with respect to the base. At least a portion of the supply tank is positioned above and over the recovery tank in a direction normal to a surface to be cleaned when the extractor handle is in an upright storage position. The supply tank is in fluid communication with the distribution nozzle to supply cleaning fluid to the distribution nozzle. The extractor cleaning machine is liftable by the recovery tank handle when the extractor handle is in the upright storage position.
摘要翻译： 提取器清洁机包括具有分配喷嘴和吸嘴的基座，与吸嘴流体连通的抽吸源，可移除地联接到基座并具有回收罐手柄的回收罐，可枢转地联接到基座的提取器手柄 以及一个联接到提取器手柄的供应罐，用于与提取器把手相对于基座枢转运动。 当提取器手柄处于直立存储位置时，供应罐的至少一部分在垂直于待清洁表面的方向上定位在回收罐上方和上方。 供应罐与分配喷嘴流体连通，以将清洁流体供应到分配喷嘴。 当提取器手柄处于直立存储位置时，提取器清洁机器可由回收罐手柄提升。
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公开(公告)号：US07138820B2
公开(公告)日：2006-11-21
申请号：US10837135
申请日：2004-04-30
IPC分类号： H03K19/03
CPC分类号： H03K19/17732 , G01R31/3167 , G01R31/318516
摘要： Method and apparatus for a system monitor (20) embedded in a programmable logic device (10, 50, 60) are described. The system monitor (20) includes a dynamic reconfiguration port interface (205) for configuring or reconfiguring the system monitor (20) during operation thereof. The system monitor (20) includes an analog-to-digital converter (200) which is reconfigurable responsive to input via a dynamic reconfiguration port (201).
摘要翻译： 描述嵌入可编程逻辑器件（10,50,60）中的系统监视器（20）的方法和装置。 系统监视器（20）包括用于在其操作期间配置或重新配置系统监视器（20）的动态重新配置端口接口（205）。 系统监视器（20）包括响应于经由动态重新配置端口（201）的输入而被重新配置的模数转换器（200）。
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公开(公告)号：US06727749B1
公开(公告)日：2004-04-27
申请号：US10232113
申请日：2002-08-29
申请人： Patrick J. Quinn
发明人： Patrick J. Quinn
IPC分类号： H03F102
摘要： An apparatus and method for adding input voltage signals. First and second input voltage signals are respectively sampled onto first and second capacitors during a first clock phase. In response to a second clock phase, the first sampled input voltage that is held on the first capacitor is coupled to the negative input terminal of an amplifier, and the second sampled voltage held on the second capacitor is coupled to the positive terminal of the amplifier. A feedback voltage is provided from the amplifier output to the negative amplifier input via the first capacitor during the second clock phase. The first and second input voltage signals are added at the amplifier during the second clock phase to output the sum in response to the sampled input voltage signals and the output feedback, whereby the resulting transfer function is independent of capacitor mismatch and non-linearity.
摘要翻译： 一种用于增加输入电压信号的装置和方法。 在第一时钟相位期间，第一和第二输入电压信号分别被采样到第一和第二电容器上。 响应于第二时钟相位，保持在第一电容器上的第一采样输入电压耦合到放大器的负输入端子，并且保持在第二电容器上的第二采样电压耦合到放大器的正极端子 。 在第二时钟相位期间，通过第一电容器从放大器输出端向负放大器输入提供反馈电压。 在第二时钟相位期间，第一和第二输入电压信号在放大器处相加，以响应于采样的输入电压信号和输出反馈来输出和，由此所得到的传递函数与电容器失配和非线性无关。
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公开(公告)号：US08362589B2
公开(公告)日：2013-01-29
申请号：US12276293
申请日：2008-11-21
申请人： Patrick J. Quinn
发明人： Patrick J. Quinn
IPC分类号： H01L21/02
CPC分类号： H01L28/60 , H01G4/228 , H01G4/232 , H01L23/5223 , H01L23/5225 , H01L27/0207 , H01L27/0805 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A capacitor in an integrated circuit (“IC”) has a distribution grid formed in a first patterned metal layer of the integrated circuit and a first vertical conductive filament connected to and extending away from the distribution grid along a first direction. A second vertical conductive filament is connected to the distribution grid and extends in the opposite direction. First and second grid plates are formed in the metal layers above and below the first patterned metal layer. The grid plates surround the first and second vertical conductive filaments. The distribution grid, first vertical conductive filament and second vertical conductive filament are connected to and form a portion of a first node of the capacitor and the first grid plate and the second grid plate are connected to and form a portion of a second node of the capacitor.
摘要翻译： 集成电路（IC）中的电容器具有形成在集成电路的第一图案化金属层中的配电栅格，以及沿着第一方向连接到分布栅格并远离配电网的第一垂直导电细丝。 第二垂直导电细丝连接到配电网并沿相反方向延伸。 第一和第二格栅板形成在第一图案化金属层上方和下方的金属层中。 格栅板围绕第一和第二垂直导电细丝。 分配网格，第一垂直导电细丝和第二垂直导电细丝连接并形成电容器的第一节点的一部分，并且第一格栅板和第二格栅板连接到并形成第二栅极板的第二节点的一部分 电容器。
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