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公开(公告)号:US06826748B1
公开(公告)日:2004-11-30
申请号:US09339749
申请日:1999-06-24
申请人: Paul H. Hohensee , David L. Reese , John S. Yates, Jr. , Korbin S. Van Dyke , T. R. Ramesh , Shalesh Thusoo , Gurjeet Singh Saund , Niteen Aravind Patkar
发明人: Paul H. Hohensee , David L. Reese , John S. Yates, Jr. , Korbin S. Van Dyke , T. R. Ramesh , Shalesh Thusoo , Gurjeet Singh Saund , Niteen Aravind Patkar
IPC分类号: G06F944
CPC分类号: G06F9/45558 , G06F9/45541 , G06F9/45554 , G06F2009/45583
摘要: A method and computer for performance of the method. While executing a program on a computer, the computer uses registers of a general register file for storage of instruction results. Profile information describing the profileable events is recorded into the general register file as the profileable events occur, without first capturing the information into a main memory of the computer.
摘要翻译: 用于执行该方法的方法和计算机。 在计算机上执行程序时,计算机使用通用寄存器文件的寄存器来存储指令结果。 描述可概要事件的简档信息可记录在通用寄存器文件中,因为可以描述事件的发生,而无需先将信息捕获到计算机的主存储器中。
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公开(公告)号:US07013456B1
公开(公告)日:2006-03-14
申请号:US09334530
申请日:1999-06-16
申请人: Korbin S. Van Dyke , Paul H. Hohensee , David L. Reese , John S. Yates, Jr. , T. R. Ramesh , Shalesh Thusoo , Gurjeet Singh Saund , Stephen C. Purcell , Niteen Aravind Patkar
发明人: Korbin S. Van Dyke , Paul H. Hohensee , David L. Reese , John S. Yates, Jr. , T. R. Ramesh , Shalesh Thusoo , Gurjeet Singh Saund , Stephen C. Purcell , Niteen Aravind Patkar
IPC分类号: G06F9/44
CPC分类号: G06F9/45533 , G06F9/45541 , G06F9/45554
摘要: A method and a computer for performance of the method. While executing a program on a computer, profileable events occurring in the instruction pipeline are detected. The instruction pipeline is directed to record profile information describing the profileable events essentially concurrently with the occurrence of the profileable events. The detecting and recording occur under control of hardware of the computer without software intervention.
摘要翻译: 一种用于执行该方法的方法和计算机。 在计算机上执行程序时,检测到在指令流水线中发生的可轮廓事件。 该指令流水线用于记录描述可概要事件的简档信息,基本上与可概要事件的发生同时发生。 检测和记录在没有软件干预的情况下在计算机硬件的控制下进行。
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公开(公告)号:US06941545B1
公开(公告)日:2005-09-06
申请号:US09322443
申请日:1999-05-28
申请人: David L. Reese , John S. Yates, Jr. , Paul H. Hohensee , Korbin S. Van Dyke , T. R. Ramesh , Shalesh Thusoo , Gurjeet Singh Saund , Niteen Aravind Patkar
发明人: David L. Reese , John S. Yates, Jr. , Paul H. Hohensee , Korbin S. Van Dyke , T. R. Ramesh , Shalesh Thusoo , Gurjeet Singh Saund , Niteen Aravind Patkar
CPC分类号: G06F9/45554 , G06F9/45541 , G06F9/45558 , G06F2009/45583
摘要: A computer. An instruction pipeline and memory access unit execute instructions in a logical address space of a memory of the computer. An address translation circuit translates address references generated by the program from the program's logical address space to the computer's physical address space. Profile circuitry is cooperatively interconnected with the instruction pipeline and configured to detect, without compiler assistance for execution profiling, occurrence of profilable events occurring in the instruction pipeline, and is cooperatively interconnected with the memory access unit to record profile information describing physical memory addresses referenced during an execution interval of the program.
摘要翻译: 一台电脑。 指令流水线和存储器访问单元在计算机的存储器的逻辑地址空间中执行指令。 地址转换电路将由程序生成的地址参考从程序的逻辑地址空间转换为计算机的物理地址空间。 简档电路与指令流水线协作地互连,并且被配置为在没有编译器帮助执行分析的情况下检测在指令流水线中发生的可概要事件的发生,并且与存储器访问单元协作地互连以记录描述参考的物理存储器地址的简档信息 程序的执行间隔。
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公开(公告)号:US07228404B1
公开(公告)日:2007-06-05
申请号:US09672440
申请日:2000-09-28
申请人: Ronak Patel , Korbin S. Van Dyke , T.R. Ramesh , Shalesh Thusoo , Gurjeet Singh Saund , Sanjay Mansingh , Paul William Campbell
发明人: Ronak Patel , Korbin S. Van Dyke , T.R. Ramesh , Shalesh Thusoo , Gurjeet Singh Saund , Sanjay Mansingh , Paul William Campbell
IPC分类号: G06F9/00
CPC分类号: G06F9/30174 , G06F9/3851 , G06F9/3861
摘要: A computer. When an instruction calling for an architecturally-visible side-effect in an architecturally-visible storage location is recognized, a value is stored representative of an architecturally-visible representation of the side-effect, a format of the representative value being different than an architecturally-visible representation of the side-effect. Execution is resumed without generating the architecturally-visible side-effect. Later, the architecturally-visible representation corresponding to the representative value is written into the architecturally-visible storage location. On a context switch, a context of a first process is written and a context of a second process is loaded to place the second process into execution. At least some instructions maintain results in storage resources outside the context resource set, and instructions are marked to indicate whether or not a context switch may be performed at a boundary of the marked instruction. Instruction execution is monitored for a condition that is a superset of a condition whose occurrence is desired to be detected, and a first exception is raised as a result of recognizing the superset condition. Software filters the superset condition to determine whether the monitored condition has occurred, and if so, the software establishes a second exception to be raised after execution of further instructions of the instruction stream. When it is recognized that an instruction is to affect the execution of a second instruction, the processor is set into single-step mode. After the second instruction is executed, the computer is set out of single-step mode.
摘要翻译: 一台电脑。 当识别到在建筑上可见的存储位置中要求建筑上可见的副作用的指令时,存储代表该副作用的结构可视表示的值,代表值的格式不同于体系结构 副作用的隐形表示。 恢复执行,而不产生架构上可见的副作用。 之后,对应于代表值的架构可视化表示被写入架构可见的存储位置。 在上下文切换中,写入第一进程的上下文并加载第二进程的上下文以使第二进程执行。 至少一些指令在上下文资源集合之外保持存储资源的结果,并且标记指令以指示是否可以在标记指令的边界执行上下文切换。 监视指示执行是作为期望发生的条件的超集的条件,并且作为识别超集条件的结果而引起第一异常。 软件过滤超集条件以确定监视条件是否已经发生,如果是,则软件在执行指令流的进一步指令之后建立第二个异常。 当识别到指令影响第二指令的执行时,处理器被设置为单步模式。 执行第二条指令后,计算机将处于单步模式。
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