公开(公告)号：US20060288318A1

公开(公告)日：2006-12-21

申请号：US11159285

申请日：2005-06-21

Applicant: Peter Wright ,  Minghui Fan

Inventor： Peter Wright ,  Minghui Fan

IPC: G06F17/50

CPC classification number: G06F17/5068 ,  G03F1/36 ,  G03F7/70441 ,  G06F2217/12 ,  Y02P90/265

Abstract: One embodiment of the present invention provides a system that associates an error in a layout with a cell. During operation, the system receives a layout which is designed to create a target feature with an intended shape. Next, the system determines an error in a critical dimension of the target feature. The system then identifies a cell in the layout based on the error's location in the layout, thereby associating the error with the cell. Note that associating errors with cells allows the errors to be summarized based on the associated cells, which can reduce the amount of time required to identify and fix the errors.

Abstract translation: 本发明的一个实施例提供了一种将布局中的错误与单元相关联的系统。 在操作期间，系统接收设计用于创建具有预期形状的目标特征的布局。 接下来，系统确定目标特征的关键维度中的错误。 系统然后基于错误在布局中的位置来识别布局中的单元，从而将错误与单元相关联。 请注意，将错误与单元相关联允许基于相关联的单元格来总结错误，这可以减少识别和修复错误所需的时间。

公开(公告)号：US07313774B2

公开(公告)日：2007-12-25

申请号：US11159285

申请日：2005-06-21

Applicant: Peter J. Wright ,  Minghui Fan

Inventor： Peter J. Wright ,  Minghui Fan

IPC: G06F17/50 ,  G06F9/45

CPC classification number: G06F17/5068 ,  G03F1/36 ,  G03F7/70441 ,  G06F2217/12 ,  Y02P90/265

Abstract: One embodiment of the present invention provides a system that associates an error in a layout with a cell. During operation, the system receives a layout which is designed to create a target feature with an intended shape. Next, the system determines an error in a critical dimension of the target feature. The system then identifies a cell in the layout based on the error's location in the layout, thereby associating the error with the cell. Note that associating errors with cells allows the errors to be summarized based on the associated cells, which can reduce the amount of time required to identify and fix the errors.

Abstract translation: 本发明的一个实施例提供了一种将布局中的错误与单元相关联的系统。 在操作期间，系统接收设计用于创建具有预期形状的目标特征的布局。 接下来，系统确定目标特征的关键维度中的错误。 系统然后基于错误在布局中的位置来识别布局中的单元，从而将错误与单元相关联。 请注意，将错误与单元相关联允许基于相关联的单元格来总结错误，这可以减少识别和修复错误所需的时间。

公开(公告)号：US06294480B1

公开(公告)日：2001-09-25

申请号：US09443427

申请日：1999-11-19

Applicant: Yelehanka Ramachandramurthy Pradeep ,  Jie Yu ,  Minghui Fan ,  Chiew Wah Yap

Inventor： Yelehanka Ramachandramurthy Pradeep ,  Jie Yu ,  Minghui Fan ,  Chiew Wah Yap

IPC: H01L2131

CPC classification number: H01L29/6653 ,  H01L21/31116 ,  H01L21/31144 ,  H01L29/6659

Abstract: A method for forming an L-shaped spacer using a sacrificial organic top coating. A semiconductor structure is provided having a gate structure thereon. A liner oxide layer is formed on the gate structure. A dielectric spacer layer is formed on the liner oxide layer. In the preferred embodiment, the dielectric spacer layer comprises a silicon nitride layer or a silicon oxynitride layer. A sacrificial organic layer is formed on the dielectric spacer layer. The sacrificial organic layer and the dielectric spacer layer are anisotropically etched to form spacers comprising a triangle-shaped sacrificial organic structure and an L-shaped dielectric spacer. The triangle-shaped sacrificial organic structure is removed leaving an L-shaped dielectric spacer.

Abstract translation: 一种使用牺牲有机顶涂层形成L形间隔件的方法。 提供其上具有栅极结构的半导体结构。 在栅极结构上形成衬里氧化物层。 介电间隔层形成在衬垫氧化物层上。 在优选实施例中，电介质间隔层包括氮化硅层或氮氧化硅层。 在电介质间隔层上形成牺牲有机层。 牺牲有机层和电介质间隔层被各向异性蚀刻以形成包括三角形牺牲有机结构和L形介电间隔物的间隔物。 去除三角形牺牲有机结构留下L形介电隔离物。