Nonvolatile memory using flexible erasing methods and method and system for using same
    1.
    发明授权
    Nonvolatile memory using flexible erasing methods and method and system for using same 有权
    非易失性存储器采用灵活的擦除方法和方法及系统使用

    公开(公告)号:US06411546B1

    公开(公告)日:2002-06-25

    申请号:US09565517

    申请日:2000-05-05

    IPC分类号: G11C1604

    摘要: An embodiment of the present invention is disclosed to include a nonvolatile memory system for controlling erase operations performed on a nonvolatile memory array comprised of rows and columns, the nonvolatile memory array stores digital information organized into blocks with each block having one or more sectors of information and each sector having a user data field and an extension field and each sector stored within a row of the memory array. A controller circuit is coupled to a host circuit and is operative to perform erase operations on the nonvolatile memory array, the controller circuit erases an identified sector of information having a particular user data field and a particular extension field wherein the particular user field and the particular extension field are caused to be erased separately.

    摘要翻译: 公开了本发明的实施例,其包括用于控制对由行和列组成的非易失性存储器阵列执行的擦除操作的非易失性存储器系统,非易失性存储器阵列存储组织成块的数字信息,每个块具有一个或多个信息扇区 并且每个扇区具有用户数据字段和扩展字段,并且每个扇区存储在存储器阵列的行内。 控制器电路耦合到主机电路并且可操作以对非易失性存储器阵列执行擦除操作,控制器电路擦除所识别的具有特定用户数据字段和特定扩展字段的信息扇区,其中特定用户字段和特定用户字段 扩展字段被分别擦除。

    Non-uniform switching based non-volatile magnetic based memory
    5.
    发明授权
    Non-uniform switching based non-volatile magnetic based memory 有权
    基于非均匀开关的非易失性磁性存储器

    公开(公告)号:US08389301B2

    公开(公告)日:2013-03-05

    申请号:US13305668

    申请日:2011-11-28

    IPC分类号: H01L21/00

    摘要: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.

    摘要翻译: 非均匀开关型非易失性磁存储元件包括固定层,形成在固定层顶部上的阻挡层,形成在阻挡层顶部上的第一自由层,形成非均匀开关层(NSL) 在第一自由层的顶部和形成在不均匀开关层的顶部上的第二自由层。 在基本上垂直于固定层,阻挡层,第一自由层,不均匀的开关层和第二自由层的方向上施加开关电流,导致第一自由层,第二自由层和非自由层的状态之间的切换, 均匀的开关层,开关电流大大降低。

    NON-UNIFORM SWITCHING BASED NON-VOLATILE MAGNETIC BASED MEMORY
    6.
    发明申请
    NON-UNIFORM SWITCHING BASED NON-VOLATILE MAGNETIC BASED MEMORY 有权
    基于非均匀开关的非易失性磁性存储器

    公开(公告)号:US20080094886A1

    公开(公告)日:2008-04-24

    申请号:US11674124

    申请日:2007-02-12

    IPC分类号: G11C11/14 H01L21/8239

    摘要: One embodiment of the present invention includes a non-uniform switching based non-volatile magnetic memory element including a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer, wherein switching current is applied, in a direction that is substantially perpendicular to the fixed, barrier, first free, non-uniform and the second free layers causing switching between states of the first, second free and non-uniform layers with substantially reduced switching current.

    摘要翻译: 本发明的一个实施例包括:非均匀的基于开关的非易失性磁存储元件,其包括固定层,形成在固定层顶部的阻挡层,形成在阻挡层顶部上的第一自由层, 形成在第一自由层的顶部上的均匀开关层(NSL)和形成在非均匀开关层顶部的第二自由层,其中施加开关电流,其基本上垂直于固定屏障的方向, 第一自由,不均匀和第二自由层引起第一,第二自由和非均匀层的状态之间的切换,其开关电流大大降低。

    NON-UNIFORM SWITCHING BASED NON-VOLATILE MAGNETIC BASED MEMORY
    8.
    发明申请
    NON-UNIFORM SWITCHING BASED NON-VOLATILE MAGNETIC BASED MEMORY 审中-公开
    基于非均匀开关的非易失性磁性存储器

    公开(公告)号:US20120069643A1

    公开(公告)日:2012-03-22

    申请号:US13305677

    申请日:2011-11-28

    IPC分类号: G11C11/00

    摘要: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.

    摘要翻译: 非均匀开关型非易失性磁存储元件包括固定层,形成在固定层顶部上的阻挡层,形成在阻挡层顶部上的第一自由层,形成非均匀开关层(NSL) 在第一自由层的顶部和形成在不均匀开关层的顶部上的第二自由层。 在基本上垂直于固定层,阻挡层,第一自由层,不均匀的开关层和第二自由层的方向上施加开关电流,导致第一自由层,第二自由层和非自由层的状态之间的切换, 均匀的开关层,开关电流大大降低。

    Non-uniform switching based non-volatile magnetic based memory
    9.
    发明授权
    Non-uniform switching based non-volatile magnetic based memory 有权
    基于非均匀开关的非易失性磁性存储器

    公开(公告)号:US08084835B2

    公开(公告)日:2011-12-27

    申请号:US11674124

    申请日:2007-02-12

    IPC分类号: H01L29/82 G11C11/00

    摘要: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.

    摘要翻译: 非均匀开关型非易失性磁存储元件包括固定层,形成在固定层顶部上的阻挡层,形成在阻挡层顶部上的第一自由层,形成非均匀开关层(NSL) 在第一自由层的顶部和形成在不均匀开关层的顶部上的第二自由层。 在基本上垂直于固定层,阻挡层,第一自由层,不均匀的开关层和第二自由层的方向上施加开关电流,导致第一自由层,第二自由层和非自由层的状态之间的切换, 均匀的开关层,开关电流大大降低。

    Precision clock synthesizer using RC oscillator and calibration circuit
    10.
    发明授权
    Precision clock synthesizer using RC oscillator and calibration circuit 有权
    精密时钟合成器采用RC振荡器和校准电路

    公开(公告)号:US06404246B1

    公开(公告)日:2002-06-11

    申请号:US09741971

    申请日:2000-12-20

    IPC分类号: H03L706

    CPC分类号: H03L7/18 H03K3/0231 H03L7/087

    摘要: A system and method of generating an output signal of very precise frequency without the use of a crystal oscillator. An input signal is generated using any convenient such as an RC oscillator. A circuit for producing a frequency-controlled output signal comprises a phase lock loop having a VCO and a down counter. The down counter reduces the frequency of a VCO clock signal in accordance with a down count value. The down count value is loaded in a register and stored in non-volatile memory. The down count value is set during a calibration operation using a precision external clock signal. In this way, a clock signal with a highly precise frequency is generated without using a crystal oscillator.

    摘要翻译: 一种在不使用晶体振荡器的情况下产生非常精确频率的输出信号的系统和方法。 使用任何方便的RC振荡器产生输入信号。 用于产生频率控制的输出信号的电路包括具有VCO和向下计数器的锁相环。 下降计数器根据递减计数值降低VCO时钟信号的频率。 递减计数值加载到寄存器中并存储在非易失性存储器中。 在使用精密外部时钟信号的校准操作期间设置递减计数值。 以这种方式,在不使用晶体振荡器的情况下产生具有高精度频率的时钟信号。