IMAGE SENSOR CIRCUIT AND RAMP SIGNAL GENERATOR THEREOF

    公开(公告)号:US20190394415A1

    公开(公告)日:2019-12-26

    申请号:US16018015

    申请日:2018-06-25

    Inventor: Shiue-Shin Liu

    Abstract: The present invention discloses an image sensor circuit and a ramp signal generator thereof. The image sensor circuit includes: an active pixel sensor (APS) array which includes plural pixel circuits arranged in an array of columns and rows; plural slope analog-to-digital converter (ADC), wherein each of the slope ADC is coupled to the corresponding column, and generates a digital sampling signal according to a ramp signal together with a pixel signal including a reset signal and a image signal which are generated by the pixel circuit located in the selected row and in the column corresponding to the slope ADC; and the ramp signal generator, which generates the ramp signal, wherein the ramp signal generator includes an active integrator, and the active integrator generates the ramp signal by charging an integration capacitor with a gain current.

    Image sensor circuit and ramp signal generator thereof

    公开(公告)号:US10721427B2

    公开(公告)日:2020-07-21

    申请号:US16018015

    申请日:2018-06-25

    Inventor: Shiue-Shin Liu

    Abstract: The present invention discloses an image sensor circuit and a ramp signal generator thereof. The image sensor circuit includes: an active pixel sensor (APS) array which includes plural pixel circuits arranged in an array of columns and rows; plural slope analog-to-digital converter (ADC), wherein each of the slope ADC is coupled to the corresponding column, and generates a digital sampling signal according to a ramp signal together with a pixel signal including a reset signal and a image signal which are generated by the pixel circuit located in the selected row and in the column corresponding to the slope ADC; and the ramp signal generator, which generates the ramp signal, wherein the ramp signal generator includes an active integrator, and the active integrator generates the ramp signal by charging an integration capacitor with a gain current.

    ANALOG-TO-DIGITAL CONVERTER DEVICE AND METHOD CAPABLE OF ADJUSTING BIT CONVERSION CYCLE OF ANALOG-TO-DIGITAL CONVERSION OPERATION

    公开(公告)号:US20230223945A1

    公开(公告)日:2023-07-13

    申请号:US17574583

    申请日:2022-01-13

    Inventor: Shiue-Shin Liu

    CPC classification number: H03M1/0604

    Abstract: An ADC device includes a DAC circuit, a comparator circuit, a SAR decision circuit, an oscillator circuit having a delay unit, and a processing circuit. The oscillator circuit is used for generating the clock signal according to a reset signal and a delay of the delay unit. The processing circuit is used for sequentially generating multiple bit conversion signals associated with multiple different bits of the decision signal, for generating at least one guard signal which follows the multiple bit conversion signals, and then for comparing the at least one guard signal with the reset signal to adjust the delay generated by the delay unit of the oscillator circuit.

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