Chip substrate comprising a groove portion and chip package using the chip substrate

    公开(公告)号:US09653664B2

    公开(公告)日:2017-05-16

    申请号:US14753915

    申请日:2015-06-29

    CPC classification number: H01L33/58 H01L33/44 H01L33/486 H01L33/62

    Abstract: Disclosed is a chip substrate. The chip substrate includes: conductive portions laminated in one direction to constitute the chip substrate; insulation portions alternately laminated with the conductive portions to electrically isolate the conductive portions; a cavity formed at a predetermined depth in a recessed shape in a region including the insulation portions on an upper surface of the chip substrate; and a groove portion disposed outside the cavity in a spaced-apart relationship with the cavity and formed at a predetermined depth in a recessed shape. According to the present invention, an adhesive agent is applied in a groove portion formed in advance. It is therefore possible to prevent the adhesive agent from being exposed to the light emitted from optical elements and to prevent the adhesive agent from being denatured. This makes it possible to enhance the reliability of lens bonding. Furthermore, there is no need to use an expensive resistant adhesive agent. An existing typical adhesive agent may be used as it is. This provides an effect of saving costs. Thus, there is an advantage in that a low-priced existing bonding material may be applied to a high-priced UV-C (deep-UV) package.

Patent Agency Ranking