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公开(公告)号:US20230223417A1
公开(公告)日:2023-07-13
申请号:US17700516
申请日:2022-03-22
发明人: Chih-Ping Chung , Ming-Yu Ho , Saysamone Pittikoun
IPC分类号: H01L27/146
CPC分类号: H01L27/1463 , H01L27/14685 , H01L27/14636 , H01L27/14627 , H01L27/14621 , H01L27/14623
摘要: Provided are an image sensor and a manufacturing method thereof. In the image sensor, an insulating layer and a first silicon layer are sequentially on a silicon base. A first isolation structure is in the first silicon layer to define an active area (AA). A doped region is in a part of the first silicon layer in the AA and in a part of the silicon base thereunder. A second silicon layer is in a part of the first silicon layer in the AA and extends into the silicon base. An interconnection structure is on the first silicon layer and electrically connected with a transistor. A second isolation structure is in the silicon base under the first isolation structure and connected to the insulating layer. A passivation layer surrounds the silicon base and is connected to the doped region. A microlens is on the silicon base.
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公开(公告)号:US20230043664A1
公开(公告)日:2023-02-09
申请号:US17458586
申请日:2021-08-27
发明人: Jun-Ming Su , Chih-Ping Chung , Ming-Yu Ho
IPC分类号: H01L27/146
摘要: A backside illuminated image sensor, including a semiconductor layer, a first gate structure, and a light sensing device, is provided. The semiconductor layer has a first surface and a second surface opposite to each other. The first gate structure is disposed on the second surface. The light sensing device is located in the semiconductor layer. The light sensing device extends from the first surface to the second surface.
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公开(公告)号:US12040343B2
公开(公告)日:2024-07-16
申请号:US17458586
申请日:2021-08-27
发明人: Jun-Ming Su , Chih-Ping Chung , Ming-Yu Ho
IPC分类号: H01L27/00 , H01L27/146
CPC分类号: H01L27/1464 , H01L27/1461 , H01L27/14614 , H01L27/14621 , H01L27/14627 , H01L27/14689
摘要: A backside illuminated image sensor, including a semiconductor layer, a first gate structure, and a light sensing device, is provided. The semiconductor layer has a first surface and a second surface opposite to each other. The first gate structure is disposed on the second surface. The light sensing device is located in the semiconductor layer. The light sensing device extends from the first surface to the second surface.
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公开(公告)号:US12094905B2
公开(公告)日:2024-09-17
申请号:US17700516
申请日:2022-03-22
发明人: Chih-Ping Chung , Ming-Yu Ho , Saysamone Pittikoun
IPC分类号: H01L27/146
CPC分类号: H01L27/1463 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14636 , H01L27/14685
摘要: Provided are an image sensor and a manufacturing method thereof. In the image sensor, an insulating layer and a first silicon layer are sequentially on a silicon base. A first isolation structure is in the first silicon layer to define an active area (AA). A doped region is in a part of the first silicon layer in the AA and in a part of the silicon base thereunder. A second silicon layer is in a part of the first silicon layer in the AA and extends into the silicon base. An interconnection structure is on the first silicon layer and electrically connected with a transistor. A second isolation structure is in the silicon base under the first isolation structure and connected to the insulating layer. A passivation layer surrounds the silicon base and is connected to the doped region. A microlens is on the silicon base.
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公开(公告)号:US20240290815A1
公开(公告)日:2024-08-29
申请号:US18656610
申请日:2024-05-07
发明人: Jun-Ming Su , Chih-Ping Chung , Ming-Yu Ho
IPC分类号: H01L27/146
CPC分类号: H01L27/1464 , H01L27/1461 , H01L27/14614 , H01L27/14621 , H01L27/14627 , H01L27/14689
摘要: A backside illuminated image sensor, including a semiconductor layer, a first gate structure, and a light sensing device, is provided. The semiconductor layer has a first surface and a second surface opposite to each other. The first gate structure is disposed on the second surface. The light sensing device is located in the semiconductor layer. The light sensing device extends from the first surface to the second surface.
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公开(公告)号:US20240170526A1
公开(公告)日:2024-05-23
申请号:US18152061
申请日:2023-01-09
IPC分类号: H01L27/146
CPC分类号: H01L27/1464 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/14636 , H01L27/14685
摘要: A back side illumination (BSI) image sensor includes an epitaxial substrate, a deep trench isolation (DTI) structure from one surface to the other surface of the epitaxial substrate, a buried oxide layer on the epitaxial substrate, an epitaxial layer, a well region, a floating diffusion (FD) region, a shallow trench isolation (STI) structure, and vertical transfer gates (VTGs). The buried oxide layer has openings exposing the epitaxial substrate, and the epitaxial layer is formed on the epitaxial substrate and covers the buried oxide layer. The well region is in the epitaxial layer and the epitaxial substrate. The FD region is in the well region above the buried oxide layer, and a width of the buried oxide layer is larger than that of the FD region. The STI structure is in the epitaxial layer. The VTGs are in the epitaxial layer and through the openings of the buried oxide layer.
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公开(公告)号:US20240072083A1
公开(公告)日:2024-02-29
申请号:US18092450
申请日:2023-01-03
发明人: Chih-Ping Chung , Ming-Yu Ho , Saysamone Pittikoun
IPC分类号: H01L27/146
CPC分类号: H01L27/14616 , H01L27/1462 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/1463 , H01L27/14645 , H01L27/14685 , H01L27/14687 , H01L27/14689
摘要: A 3D CMOS image sensor is provided in the present invention, including a semiconductor substrate, a photodiode and a well formed in the semiconductor substrate, a shallow trench isolation (STI) layer formed on a front surface of the semiconductor substrate, a fin protruding upwardly from the semiconductor substrate through the STI layer, wherein the fin is composed of the photodiode and the well, a first gate spanning the photodiode portion and the well portion abutting the photodiode portion of the fin to constitute a transfer transistor, a second gate spanning in the middle of the well portion of the fin to constitute a reset transistor, and a floating diffusion region in the well portion of the fin between the first gate and the second gate electrically connecting the transfer transistor and the reset transistor.
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