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11 条记录 (耗时 0.013 秒)

    Helically ribbed electroplating barrel
    1.
    发明授权
    Helically ribbed electroplating barrel 有权

    公开(公告)号：US11352709B1

    公开(公告)日：2022-06-07

    申请号：US16560383

    申请日：2019-09-04

    申请人： Presidio Components. Inc.

    发明人： Hung Van Trinh

    IPC分类号： C25D17/20 ,  C25D5/22

    摘要： A rotatable electroplating barrel for electroplating articles, the electroplating barrel having a proximal end with a centrally formed aperture and a distal end with at least one helical rib extending circumferentially along a longitudinal axis and between the proximal end and the distal end. The at least one helical rib, proximal end, and distal end of the electroplating barrel are formed integrally as a unitary piece and have a contiguous perforated outer wall configured to couple directly to the proximal and distal ends, extending therearound to enclose the at least one helical rib.

    Multilayer Broadband Ceramic Capacitor with Internal Air Gap Capacitance
    5.
    发明申请
    Multilayer Broadband Ceramic Capacitor with Internal Air Gap Capacitance 审中-公开

    公开(公告)号：US20190043669A1

    公开(公告)日：2019-02-07

    申请号：US16156708

    申请日：2018-10-10

    申请人： Presidio Components. Inc.

    发明人： Hung Van Trinh ,  Alan Devoe ,  Lambert Devoe

    IPC分类号： H01G4/30 ,  H01G4/12

    摘要： A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.

    Multilayer Broadband Ceramic Capacitor with Internal Air Gap Capacitance
    6.
    发明申请
    Multilayer Broadband Ceramic Capacitor with Internal Air Gap Capacitance 审中-公开

    公开(公告)号：US20180294102A1

    公开(公告)日：2018-10-11

    申请号：US15942987

    申请日：2018-04-02

    申请人： Presidio Components. Inc.

    发明人： Hung Van Trinh ,  Alan Devoe ,  Lambert Devoe

    IPC分类号： H01G4/30 ,  H01G4/12 ,  H01G4/005

    摘要： A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is wholly enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.

    High voltage fringe-effect capacitor
    7.
    发明授权
    High voltage fringe-effect capacitor 有权

    公开(公告)号：US10741330B1

    公开(公告)日：2020-08-11

    申请号：US16372991

    申请日：2019-04-02

    申请人： Presidio Components. Inc.

    发明人： Hung Van Trinh ,  Alan Devoe

    IPC分类号： H01G4/35 ,  H01G4/005 ,  H01G4/30 ,  H01G4/012

    摘要： A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.

    ELECTRICAL DEVICES AND METHODS FOR MANUFACTURING SAME
    9.
    发明申请
    ELECTRICAL DEVICES AND METHODS FOR MANUFACTURING SAME 有权
    电气设备及其制造方法

    公开(公告)号：US20150296623A1

    公开(公告)日：2015-10-15

    申请号：US14251988

    申请日：2014-04-14

    申请人： PRESIDIO COMPONENTS, INC.

    发明人： Hung Van Trinh

    IPC分类号： H05K1/18 ,  H05K3/30

    CPC分类号： H05K3/3426 ,  B23K1/0016 ,  B23K35/262 ,  C22C13/00 ,  H01G2/06 ,  H01G4/232 ,  H01G4/2325 ,  H01G4/38 ,  H01L23/495 ,  H01L23/49548 ,  H01L23/49582 ,  H01L23/498 ,  H01L23/562 ,  H05K2201/10015 ,  H05K2201/10628 ,  H05K2201/10787 ,  H05K2203/047 ,  H05K2203/1173 ,  H05K2203/1377 ,  Y02P70/613

    摘要： An electrical device for soldering to a circuit board with a solder includes a capacitor, a lead frame including a solder dam, and a solder joint electrically coupling the capacitor to the lead frame. The solder dam includes one of a physical barrier to flow or an area of reduced wettability to the solder. The solder dam is between the solder joint and the circuit board. The solder dam is on one or both of a lead portion and main portion of the lead frame. In one embodiment, the first solder dam extends substantially the full width of the first lead portion. The solder dam may be a barrier and/or include a metal oxide. A method of manufacturing the device includes soldering a lead frame to a capacitor with a solder and modifying a surface on the lead frame to include a physical barrier and/or an area of reduced wettability.

    摘要翻译： 用于焊接到具有焊料的电路板的电气装置包括电容器，包括焊料坝的引线框架和将电容器电耦合到引线框架的焊接接头。 焊料坝包括流动的物理阻挡层或对焊料的润湿性降低的区域之一。 焊点位于焊点和电路板之间。 焊料坝在引线框架的引线部分和主要部分中的一个或两个上。 在一个实施例中，第一焊料坝基本上延伸第一引线部分的整个宽度。 焊料坝可以是阻挡层和/或包括金属氧化物。 一种制造该器件的方法包括用引线焊接引线框架到电容器，并修改引线框架上的表面以包括物理屏障和/或具有降低的润湿性的区域。

    Multilayer Broadband Ceramic Capacitor with Internal Air Gap Capacitance
    10.
    发明申请
    Multilayer Broadband Ceramic Capacitor with Internal Air Gap Capacitance 有权

    公开(公告)号：US20220384115A1

    公开(公告)日：2022-12-01

    申请号：US17818205

    申请日：2022-08-08

    申请人： Presidio Components, Inc.

    发明人： Hung Van Trinh ,  Alan Devoe ,  Lambert Devoe

    IPC分类号： H01G4/30 ,  H01G4/12 ,  H01G4/35 ,  H01G4/012

    摘要： A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.