Techniques for flexible rendering operations

    公开(公告)号:US11321804B1

    公开(公告)日:2022-05-03

    申请号:US17071888

    申请日:2020-10-15

    Abstract: Methods, systems, and devices for graphics processer unit (GPU) operations are described. A device may monitor one or more states of a GPU during a duration. Based on monitoring the one or more GPU states, the device may determine an execution of a GPU command that is common to at least two GPU operations for clearing the GPU buffer. The device may determine whether the GPU clear command has previously been executed during a duration or a GPU cycle in which the device monitored the GPU states. The device may process the GPU clear command based on the determination of whether the GPU clear command has previously been executed. For example, the device may drop the GPU clear command based on the determination or modify a portion of the GPU clear command and execute at least the modified portion of the GPU clear command.

    Command instruction management
    7.
    发明授权
    Command instruction management 有权
    命令指令管理

    公开(公告)号:US09165337B2

    公开(公告)日:2015-10-20

    申请号:US14027816

    申请日:2013-09-16

    CPC classification number: G06T1/20 G06F9/3881 G06F9/50 G06F9/5022 G06T1/60

    Abstract: Techniques are described for writing commands to memory units of a chain of memory units of a command buffer. The techniques may write the commands, and if during the writing, it is determined that there is not sufficient space in the chain of memory unit, the techniques may flush previously confirmed commands. If after the writing, the techniques determine that there is not sufficient space in an allocation list for the handles associated with the commands, the techniques may flush previously confirmed commands.

    Abstract translation: 描述了将命令写入命令​​缓冲器的存储器单元链的存储器单元的技术。 这些技术可以写入命令,并且如果在写入期间确定存储器单元链中没有足够的空间,则这些技术可以刷新先前确认的命令。 如果在写入之后,这些技术确定在与命令相关联的句柄的分配列表中没有足够的空间,该技术可以冲洗以前确认的命令。

    Runtime mechanism to optimize shader execution flow

    公开(公告)号:US12229864B2

    公开(公告)日:2025-02-18

    申请号:US17817815

    申请日:2022-08-05

    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for runtime optimization of the shader execution flow. A graphics processor may obtain instruction execution data associated with a graphics workload, the instruction execution data including graphics data for a set of shader operations. The graphics processor may configure, at a first iteration, at least one predication value based on the instruction execution data including the graphics data for the set of shader operations. The graphics processor may adjust, at a second iteration, an execution flow of the graphics workload based on the configured at least one predication value, the execution flow of the graphics workload including the set of shader operations. The graphics processor may execute or refrain from executing, at the second iteration, each of the set of shader operations based on the adjusted execution flow of the graphics workload.

    Run-time mechanism for optimal shader

    公开(公告)号:US12067666B2

    公开(公告)日:2024-08-20

    申请号:US17664033

    申请日:2022-05-18

    CPC classification number: G06T15/005 G06T1/60

    Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a set of draw call instructions corresponding to a graphics workload, where the set of draw call instructions is associated with at least one run-time parameter. The apparatus may also obtain a first shader program associated with storing data in a system memory and at least one second shader program associated with storing data in a constant memory. Further, the apparatus may execute the first shader program or the at least one second shader program based on whether the at least one run-time parameter is less than or equal to a size of the constant memory. The apparatus may also update or maintain a configuration of a shader processor or a streaming processor based on executing the first shader program or the at least one second shader program.

Patent Agency Ranking