公开(公告)号：US20200083847A1

公开(公告)日：2020-03-12

申请号：US16127588

申请日：2018-09-11

Applicant: QUALCOMM INCORPORATED

Inventor： Manohar SEETHARAM ,  Lai Kan LEUNG

IPC: H03F1/30 ,  H03F3/45 ,  H03G3/30 ,  H03F3/195

Abstract: A bias circuit includes a differential amplifier including at least two field effect transistors each having a gate, a source and a drain, a gain of the differential amplifier being based at least in part on a gate bias voltage, and a temperature compensation element selectively coupled to the gate of each of the two field effect transistors, the temperature compensation element configured to provide a compensated gate bias voltage across a temperature range.

公开(公告)号：US20220131505A1

公开(公告)日：2022-04-28

申请号：US17081873

申请日：2020-10-27

Applicant: QUALCOMM Incorporated

Inventor： Makar SNAI ,  Manohar SEETHARAM

IPC: H03F1/26 ,  H03F1/22

Abstract: An active feedback low-noise amplifier includes a feedback transistor whose source couples through a feedback path to an input signal node. A bias transistor biases the source of the feedback transistor with a bias current responsive to an input signal carried on the input signal node.

公开(公告)号：US20200036345A1

公开(公告)日：2020-01-30

申请号：US16519877

申请日：2019-07-23

Applicant: QUALCOMM Incorporated

Inventor： Makar SNAI ,  Manohar SEETHARAM ,  Ehab ABDEL GHANY ,  Vinod PANIKKATH

IPC: H03F1/26 ,  H04B1/16 ,  H03F3/193

Abstract: Certain aspects of the present disclosure are directed to a circuit for signal processing. The circuit generally includes a first transformer having a first inductive element magnetically coupled with a second inductive element, and a second transformer having a third inductive element magnetically coupled with a fourth inductive element, wherein the first inductive element is coupled in series with the third inductive element. In certain aspects, the circuit also includes a first switch coupled in parallel with the third inductive element, a capacitive element coupled in parallel with the fourth inductive element, wherein a notch is formed at least by the capacitive element and the fourth inductive element, the notch circuit coupled in series with the second inductive element, and a second switch coupled in parallel with the fourth inductive element.