公开(公告)号：US20240319773A1

公开(公告)日：2024-09-26

申请号：US18297246

申请日：2023-04-07

Applicant: QUALCOMM INCORPORATED

Inventor： Srikar KARNAM VENKAT NAGA ,  Vandit CHAUHAN ,  Venkata Naga Satya Srinivas NUDURUPATI ,  Karimulla SYED ,  Rohit SINGH ,  Virat DEEPAK ,  Satyaki MUKHERJEE ,  Ashok Kumar IMMADI ,  Ronald ALTON

IPC: G06F1/26

CPC classification number: G06F1/26

Abstract: A system for performing peak current mitigation in an application programming subsystem (APSS) dynamically performs mitigation based at least in part on power rail voltage and leakage current obtained at boot time. The voltage and leakage current obtained at boot time are used to estimate peak current. A map that is generated prior to boot time maps estimated peak current to throttling level and dictates different levels of throttling to be performed for different ranges of estimated peak current. At boot time, the map is used to map the estimated peak current to a level of throttling to be applied. If conditions at run time indicate that peak current is occurring or is likely to occur soon, the mapped level of throttling is applied to mitigate the peak current.

公开(公告)号：US20240419232A1

公开(公告)日：2024-12-19

申请号：US18335037

申请日：2023-06-14

Applicant: QUALCOMM Incorporated

Inventor： Louis LOUIE ,  Ronald ALTON ,  Srikar KARNAM VENKAT NAGA ,  Sean SWEENEY

IPC: G06F1/28 ,  G06F1/18 ,  G06F1/20

Abstract: A method for device cooling includes determining whether an amount of power allocated to devices drawing power from a shared power rail exceeds a power rail limit. The method also includes reducing device traffic to a specified bandwidth level for at least one of the devices in response to the amount of power allocated to the devices drawing power from the shared power rail exceeding the power rail limit.

公开(公告)号：US20240211141A1

公开(公告)日：2024-06-27

申请号：US18145251

申请日：2022-12-22

Applicant: QUALCOMM Incorporated

Inventor： Prathviraj SHETTY ,  Srikar KARNAM VENKAT NAGA ,  Pranav AGRAWAL ,  Pankaj Kumar SHARMA ,  Louis LOUIE ,  Amod KUMAR ,  Shekar Babu MERLA ,  Odelu KUKATLA ,  Ravi Teja MANDAVILLI ,  Anshul VERMA ,  Sampath Kumar KULASEKARA ,  Sudhakar CHAKALI ,  Rajkumar HARIHARAN

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0629 ,  G06F3/0673

Abstract: Various embodiments include methods for controlling memory utilization to accommodate changes in memory accessibility due to memory refreshes include controlling bandwidth of at least one processor based on a refresh rate of a memory. Some embodiments may include receiving the refresh rate of the memory at a memory controller, and determining whether the refresh rate of the memory violates a high or low memory refresh rate threshold, sending an instruction configured to reduce or restore the bandwidth of the at least one processor in response to the determination. In some embodiments the methods may be performed by a quality of service manager, which may be part of a memory controller.