公开(公告)号：US20170046219A1

公开(公告)日：2017-02-16

申请号：US14823879

申请日：2015-08-11

Applicant: QUALCOMM INCORPORATED

Inventor： MADAN KRISHNAPPA ,  CHINH TRAN ,  LI ZHANG ,  ALAN YOUNG ,  WILLIAM BAINBRIDGE ,  Bohuslav RYCHLIK

IPC: G06F11/10 ,  H03M13/00 ,  H03M13/11

CPC classification number: G06F11/10 ,  G06F1/3206 ,  G06F1/3296 ,  G06F11/1008 ,  G06F11/1048 ,  G06F11/3058 ,  G06F11/3062 ,  G11B20/1816 ,  H03M13/11 ,  H03M13/611 ,  H03M13/6505 ,  Y02D10/172

Abstract: Various embodiments of methods and systems for bit flip identification for debugging and/or power management in a system on a chip (“SoC”) are disclosed. Exemplary embodiments seek to identify bit flip occurrences near in time to the occurrences by checking parity values of data blocks as the data blocks are written into a memory component. In this way, bit flips occurring in association with a write transaction may be differentiated from bit flips occurring in association with a read transaction. The distinction may be useful, when taken in conjunction with various parameter levels identified at the time of a bit flip recognition, to debug a memory component or, when in a runtime environment, adjust thermal and power policies that may be contributing to bit flip occurrences.

Abstract translation: 公开了用于芯片系统（“SoC”）中的调试和/或功率管理的位翻转识别的方法和系统的各种实施例。 示例性实施例旨在通过在将数据块写入存储器组件时检查数据块的奇偶校验值来识别出现在时间附近的位翻转事件。 以这种方式，与写事务相关联发生的位翻转可以与与读取事务相关联的位翻转区分开。 当与比特翻转识别时识别的各种参数级别结合使用时，区分可能是有用的，以调试存储器组件，或者当在运行时环境中调整可能导致位翻转发生的热和功率策略时 。

公开(公告)号：US20170046218A1

公开(公告)日：2017-02-16

申请号：US14823858

申请日：2015-08-11

Applicant: QUALCOMM INCORPORATED

Inventor： MADAN KRISHNAPPA ,  CHINH TRAN ,  LI ZHANG ,  ALAN YOUNG ,  WILLIAM BAINBRIDGE

IPC: G06F11/10 ,  H03M13/00 ,  H03M13/11

CPC classification number: G06F11/10 ,  G06F11/1008 ,  G06F11/1048 ,  G11C11/417 ,  G11C29/42 ,  G11C29/52 ,  H03M13/11 ,  H03M13/611

Abstract: Various embodiments of methods and systems for bit flip identification for debugging and/or power management in a system on a chip (“SoC”) are disclosed. Exemplary embodiments seek to identify bit flip occurrences near in time to the occurrences by checking parity values of data blocks as the data blocks are written into a memory component. In this way, bit flips occurring in association with a write transaction may be differentiated from bit flips occurring in association with a read transaction. The distinction may be useful, when taken in conjunction with various parameter levels identified at the time of a bit flip recognition, to debug a memory component or, when in a runtime environment, adjust thermal and power policies that may be contributing to bit flip occurrences.