Field-effect transistors (FETs) employing edge transistor current leakage suppression to reduce FET current leakage

    公开(公告)号:US11948978B2

    公开(公告)日:2024-04-02

    申请号:US16857703

    申请日:2020-04-24

    CPC classification number: H01L29/1083 H01L29/1041 H01L29/66477

    Abstract: Field-effect transistors (FETs) employing edge transistor current leakage suppression to reduce FET current leakage, and related methods, are disclosed. The FET includes a gate that includes extended-length edge gate regions overlapping semiconductor layer edges to form extended length edge conduction channels in edge transistors. In this manner, the threshold voltage of the edges transistors is increased, thus reducing current leakage of the edges transistors and overall current leakage of the FET. In another aspect, a body connection implant that is formed to short a source or drain region to a body of the FET is extended in length to form body connection implant regions underneath at least a portion of the edge gate regions. In this manner, the work functions of the edge gate regions are increased in voltage thus increasing the threshold voltage of the edge transistors and reducing current leakage of the edges transistors and the FET.

    Moisture sensor having integrated heating element

    公开(公告)号:US12228538B2

    公开(公告)日:2025-02-18

    申请号:US18189494

    申请日:2023-03-24

    Abstract: In an aspect, a device includes: a first patterned metal layer; a first dielectric layer disposed over the first patterned metal layer; a second patterned metal layer disposed over the first dielectric layer, wherein the first patterned metal layer, the first dielectric layer, and the second patterned metal layer form a first capacitor; a second moisture-sensitive dielectric layer disposed over the second patterned metal layer; and a third patterned metal layer disposed over the second moisture-sensitive dielectric layer, wherein the third patterned metal layer, the second moisture-sensitive dielectric layer, and the second patterned metal layer form a second capacitor that is moisture-sensitive, and the first patterned metal layer is further configured as a heating element to assist in removing moisture from the second moisture-sensitive dielectric layer of the second capacitor in response to provision of an electrical power to the first patterned metal layer.

    Dynamic body biasing for radio frequency (RF) switch

    公开(公告)号:US12155381B2

    公开(公告)日:2024-11-26

    申请号:US18104409

    申请日:2023-02-01

    Abstract: A radio frequency (RF) device is described. The RF device includes a switch field effect transistor (FET), having a source region, a drain region, a body region, and a gate region. The RF device also includes a dynamic bias control circuit. The dynamic bias control circuit includes a first transistor coupled to the gate region of the switch FET by a gate resistor. The dynamic bias control circuit also includes a second transistor coupled to the first transistor and coupled to the body region of the switch FET by a body resistor. The dynamic bias control circuit further includes a capacitor coupled to the body region of the switch FET by the body resistor, and the gate region of the switch FET, by the gate resistor.

    FIELD-EFFECT TRANSISTORS (FETs) EMPLOYING EDGE TRANSISTOR CURRENT LEAKAGE SUPPRESSION TO REDUCE FET CURRENT LEAKAGE

    公开(公告)号:US20210336008A1

    公开(公告)日:2021-10-28

    申请号:US16857703

    申请日:2020-04-24

    Abstract: Field-effect transistors (FETs) employing edge transistor current leakage suppression to reduce FET current leakage, and related methods, are disclosed. The FET includes a gate that includes extended-length edge gate regions overlapping semiconductor layer edges to form extended length edge conduction channels in edge transistors. In this manner, the threshold voltage of the edges transistors is increased, thus reducing current leakage of the edges transistors and overall current leakage of the FET. In another aspect, a body connection implant that is formed to short a source or drain region to a body of the FET is extended in length to form body connection implant regions underneath at least a portion of the edge gate regions. In this manner, the work functions of the edge gate regions are increased in voltage thus increasing the threshold voltage of the edge transistors and reducing current leakage of the edges transistors and the FET.

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