公开(公告)号：US11437335B2

公开(公告)日：2022-09-06

申请号：US16921152

申请日：2020-07-06

Applicant: QUALCOMM Incorporated

Inventor： Kuiwon Kang ,  Aniket Patil ,  Bohan Yan ,  Dongming He

IPC: H01L23/00 ,  H01L23/532 ,  H01L23/367

Abstract: Integrated circuit (IC) packages employing a thermal conductive semiconductor package substrate with die region split and related fabrication methods are disclosed. The package substrate includes a die split where metal contacts in one or more dielectric layers of the package substrate underneath the IC die(s) are thicker (e.g., in a core die region) than other metal contacts (e.g., in a peripheral die region) in the dielectric layer. This facilitates higher thermal dissipation from the IC die(s) through the thicker metal contacts in the package substrate. Cross-talk shielding of the package substrate may not be sacrificed since thinner metal contacts of the package substrate that carry high speed signaling can be of lesser thickness than the thicker metal contacts that provide higher thermal dissipation. The dielectric layer in the package substrate may also include dielectric materials having different thermal conductivities to further facilitate thermal dissipation and/or desired electrical or mechanical characteristics.

公开(公告)号：US11749579B2

公开(公告)日：2023-09-05

申请号：US17188236

申请日：2021-03-01

Applicant: QUALCOMM Incorporated

Inventor： Aniket Patil ,  Hong Bok We ,  Bohan Yan

IPC: H01L23/367 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/36 ,  H01L23/495 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L23/498 ,  H01L23/64

CPC classification number: H01L23/3675 ,  H01L21/4871 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/3185 ,  H01L23/36 ,  H01L23/49568 ,  H01L23/49816 ,  H01L24/32 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/18 ,  H01L23/642 ,  H01L23/645 ,  H01L23/647 ,  H01L24/83 ,  H01L2224/32258 ,  H01L2924/181

Abstract: An IC package includes a heat-generating device and an electrical device on a surface of a substrate, a mold compound disposed on the electrical device, and a thermal structure disposed on the heat-generating device, without the mold compound, to improve heat dissipation. In an example, the thermal structure includes a thermal interface material (TIM) layer and a heat sink. In the example, the TIM layer extends from the heat-generating device to a height equal to or less than the mold compound and the heat sink includes a planar exterior surface above the heat-generating device and the electrical device. In an example, a first heat sink portion of the heat sink on the heat-generating device may be a different thickness than a second heat sink portion of the heat sink on the electrical device. The thermal structure reduces a thermal resistance between the heat-generating device and the heat sink.

公开(公告)号：US20210242160A1

公开(公告)日：2021-08-05

申请号：US16921152

申请日：2020-07-06

Applicant: QUALCOMM Incorporated

Inventor： Kuiwon Kang ,  Aniket Patil ,  Bohan Yan ,  Dongming He

IPC: H01L23/00 ,  H01L23/367 ,  H01L23/532

Abstract: Integrated circuit (IC) packages employing a thermal conductive semiconductor package substrate with die region split and related fabrication methods are disclosed. The package substrate includes a die split where metal contacts in one or more dielectric layers of the package substrate underneath the IC die(s) are thicker (e.g., in a core die region) than other metal contacts (e.g., in a peripheral die region) in the dielectric layer. This facilitates higher thermal dissipation from the IC die(s) through the thicker metal contacts in the package substrate. Cross-talk shielding of the package substrate may not be sacrificed since thinner metal contacts of the package substrate that carry high speed signaling can be of lesser thickness than the thicker metal contacts that provide higher thermal dissipation. The dielectric layer in the package substrate may also include dielectric materials having different thermal conductivities to further facilitate thermal dissipation and/or desired electrical or mechanical characteristics.

公开(公告)号：US20240413137A1

公开(公告)日：2024-12-12

申请号：US18330435

申请日：2023-06-07

Applicant: QUALCOMM Incorporated

Inventor： Kuiwon Kang ,  Joan Rey Villarba Buot ,  Bohan Yan ,  Manuel Aldrete

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498

Abstract: Aspects disclosed in the detailed description include an integrated circuit (IC) package employing a metal block with metal interconnects thermally coupling a semiconductor die (“die”) to an interposer substrate for dissipating thermal energy in the die. The die is coupled to a package substrate to provide signal routing paths to the die. To facilitate additional dies being stacked in the IC package as a three-dimensional (3D) IC (3DIC) package, the IC package also includes an interposer substrate adjacent to the die. The interposer substrate supports providing additional signal routing paths to the package substrate. The interposer substrate also includes a metal block which comprises a plurality of metal layers and is thermally coupled to the die and a metal interconnect(s) in the interposer substrate to dissipate thermal energy from the die through the metal block and through the coupled metal interconnect(s).

公开(公告)号：US20220278016A1

公开(公告)日：2022-09-01

申请号：US17188236

申请日：2021-03-01

Applicant: QUALCOMM Incorporated

Inventor： Aniket Patil ,  Hong Bok We ,  Bohan Yan

IPC: H01L23/367 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: An IC package includes a heat-generating device and an electrical device on a surface of a substrate, a mold compound disposed on the electrical device, and a thermal structure disposed on the heat-generating device, without the mold compound, to improve heat dissipation. In an example, the thermal structure includes a thermal interface material (TIM) layer and a heat sink. In the example, the TIM layer extends from the heat-generating device to a height equal to or less than the mold compound and the heat sink includes a planar exterior surface above the heat-generating device and the electrical device. In an example, a first heat sink portion of the heat sink on the heat-generating device may be a different thickness than a second heat sink portion of the heat sink on the electrical device. The thermal structure reduces a thermal resistance between the heat-generating device and the heat sink.

公开(公告)号：US10679919B2

公开(公告)日：2020-06-09

申请号：US16016888

申请日：2018-06-25

Applicant: QUALCOMM Incorporated

Inventor： Kuiwon Kang ,  Zhijie Wang ,  Bohan Yan

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/367 ,  H01L23/373

Abstract: An integrated circuit package having an interposer with increased thermal conductivity and techniques for fabricating such an integrated circuit package are provided. One example integrated circuit package generally includes a package substrate, at least one semiconductor die disposed above the package substrate, and an interposer disposed above the at least one semiconductor die. The interposer includes a dielectric layer, and a metallic plate disposed adjacent to a first portion of the dielectric layer. The height of the metallic plate is greater than a height of the dielectric layer.