Robust Transistor Circuitry
    1.
    发明公开

    公开(公告)号:US20240339998A1

    公开(公告)日:2024-10-10

    申请号:US18745714

    申请日:2024-06-17

    CPC classification number: H03K17/082 H02H1/0007

    Abstract: An apparatus is disclosed for robust transistor circuitry. In example implementations, an apparatus includes a current mirror and fault handler circuitry that is coupled to the current mirror. The current mirror includes a core transistor having a control terminal, a first transistor, and a second transistor. The first transistor has a control terminal that is coupled to the control terminal of the core transistor. The second transistor has a control terminal that is coupled to the control terminal of the core transistor. The fault handler circuitry is configured to select the first transistor or the second transistor to provide a mirrored current of the current mirror.

    Robust circuitry for passive fundamental components

    公开(公告)号:US12181963B2

    公开(公告)日:2024-12-31

    申请号:US17485092

    申请日:2021-09-24

    Abstract: An apparatus is disclosed for making circuitry with passive fundamental components more robust. In example implementations, an apparatus includes at least one passive fundamental component and at least one redundant passive fundamental component. The apparatus also includes fault tolerant circuitry coupled to the at least one passive fundamental component and the at least one redundant passive fundamental component. The fault tolerant circuitry includes fault detection circuitry configured to detect a fault of the at least one passive fundamental component. The fault tolerant circuitry also includes component repair circuitry configured to disconnect the at least one passive fundamental component based on the fault.

    Robust transistor circuitry
    5.
    发明授权

    公开(公告)号:US12040785B2

    公开(公告)日:2024-07-16

    申请号:US17485005

    申请日:2021-09-24

    CPC classification number: H03K17/082 H02H1/0007

    Abstract: An apparatus is disclosed for robust transistor circuitry. In example implementations, an apparatus includes a current mirror and fault handler circuitry that is coupled to the current mirror. The current mirror includes a core transistor having a control terminal, a first transistor, and a second transistor. The first transistor has a control terminal that is coupled to the control terminal of the core transistor. The second transistor has a control terminal that is coupled to the control terminal of the core transistor. The fault handler circuitry is configured to select the first transistor or the second transistor to provide a mirrored current of the current mirror.

    Robust Circuitry for Passive Fundamental Components

    公开(公告)号:US20230098996A1

    公开(公告)日:2023-03-30

    申请号:US17485092

    申请日:2021-09-24

    Abstract: An apparatus is disclosed for making circuitry with passive fundamental components more robust. In example implementations, an apparatus includes at least one passive fundamental component and at least one redundant passive fundamental component. The apparatus also includes fault tolerant circuitry coupled to the at least one passive fundamental component and the at least one redundant passive fundamental component. The fault tolerant circuitry includes fault detection circuitry configured to detect a fault of the at least one passive fundamental component. The fault tolerant circuitry also includes component repair circuitry configured to disconnect the at least one passive fundamental component based on the fault.

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