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1.
公开(公告)号:US11614763B1
公开(公告)日:2023-03-28
申请号:US17568614
申请日:2022-01-04
Applicant: QUALCOMM Incorporated
Inventor: Debesh Bhatta , Sulin Li , Shitong Zhao , Hui Wang , John Abcarius
Abstract: An aspect of the disclosure relates to a reference voltage generator, including: a first field effect transistor (FET) including a first threshold voltage; a second FET including a second threshold voltage different than the first threshold voltage; a gate voltage generator coupled to gates of the first and second FETs; a first current source coupled in series with the first FET between first and second voltage rails; a second current source; and a first resistor coupled in series with the second current source and the second FET between the first and second voltage rails, wherein a reference voltage is generated across the first resistor.
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公开(公告)号:US11437307B2
公开(公告)日:2022-09-06
申请号:US16949695
申请日:2020-11-11
Applicant: QUALCOMM Incorporated
Inventor: Abdolreza Langari , Yuan Li , Shrestha Ganguly , Terence Cheung , Ching-Liou Huang , Hui Wang
IPC: H01L23/495 , H01L23/498 , H01L23/538 , H01L25/18 , H01L23/00 , H01L21/48 , H01L25/00
Abstract: A device that includes a first die and a package substrate. The package substrate includes a dielectric layer, a plurality of vias formed in the dielectric layer, a first plurality of interconnects formed on a first metal layer of the package substrate, and a second plurality of interconnects formed on a second metal layer of the package substrate. The device includes a first series of first solder interconnects arranged in a first direction, the first series of first solder interconnects configured to provide a first electrical connection; a second series of first solder interconnects arranged in the first direction, the second series of first solder interconnects configured to provide a second electrical connection; a first series of second solder interconnects arranged in a second direction, the first series of second solder interconnects configured to provide the first electrical connection.
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公开(公告)号:US10916494B2
公开(公告)日:2021-02-09
申请号:US16453803
申请日:2019-06-26
Applicant: QUALCOMM Incorporated
Inventor: Abdolreza Langari , Yuan Li , Shrestha Ganguly , Terence Cheung , Ching-Liou Huang , Hui Wang
IPC: H01L23/498 , H01L23/538 , H01L25/18 , H01L23/00 , H01L21/48 , H01L25/00
Abstract: A device that includes a first die and a package substrate. The package substrate includes a dielectric layer, a plurality of vias formed in the dielectric layer, a first plurality of interconnects formed on a first metal layer of the package substrate, and a second plurality of interconnects formed on a second metal layer of the package substrate. The device includes a first series of first solder interconnects arranged in a first direction, the first series of first solder interconnects configured to provide a first electrical connection; a second series of first solder interconnects arranged in the first direction, the second series of first solder interconnects configured to provide a second electrical connection; a first series of second solder interconnects arranged in a second direction, the first series of second solder interconnects configured to provide the first electrical connection.
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