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公开(公告)号:US20180076139A1
公开(公告)日:2018-03-15
申请号:US15352342
申请日:2016-11-15
Applicant: QUALCOMM Incorporated
Inventor: Yanxiang LIU , Haining YANG , Youseok SUH , Jihong CHOI , Junjing BAO
IPC: H01L23/535 , H01L23/532 , H01L21/768
CPC classification number: H01L23/535 , H01L21/76805 , H01L21/76831 , H01L21/76843 , H01L21/76895 , H01L21/76897 , H01L23/485 , H01L23/53209 , H01L23/53223 , H01L23/53238 , H01L23/53266
Abstract: A semiconductor device may include a source/drain contact trench adjacent to a gate. The source/drain contact trench may include a first portion and a second portion on the first portion. The semiconductor device also may include an insulating contact spacer liner within the source/drain contact trench. The insulating contact spacer liner contacts the first portion but not the second portion of the source/drain contact trench. The semiconductor device may further include a conductive material within the insulating contact spacer liner and the second portion of the source/drain contact trench. The conductive material may land in a source/drain region of the semiconductor device.
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公开(公告)号:US20250015047A1
公开(公告)日:2025-01-09
申请号:US18348777
申请日:2023-07-07
Applicant: QUALCOMM Incorporated
Inventor: Mustafa BADAROGLU , Jihong CHOI , Giridhar NALLAPATI , Sivakumar KUMARASAMY , Zhongze WANG , Woo Tag KANG , Periannan CHIDAMBARAM
IPC: H01L25/065 , H01L21/768 , H01L23/48 , H01L23/532
Abstract: An integrated circuit (IC) is described. The IC includes a first die having a first semiconductor layer, a first active device layer and a first back-end-of-line (BEOL) layer. The IC also includes a second die having a second semiconductor layer, a second active device layer and a second back-end-of-line (BEOL) layer, and on the first die. The IC further includes a through substrate via (TSV) extending through the first die and the second die.
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公开(公告)号:US20150028452A1
公开(公告)日:2015-01-29
申请号:US14512191
申请日:2014-10-10
Applicant: QUALCOMM INCORPORATED
Inventor: John J. ZHU , Bin YANG , PR CHIDAMBARAM , Lixin GE , Jihong CHOI
IPC: H01L23/522 , H01L49/02
CPC classification number: H01L23/538 , H01L23/5223 , H01L27/0805 , H01L28/40 , H01L2924/0002 , H01L2924/00
Abstract: A complementary back end of line (BEOL) capacitor (CBC) structure includes a metal oxide metal (MOM) capacitor structure. The MOM capacitor structure is coupled to a first upper interconnect layer of an interconnect stack of an integrated circuit (IC) device. The MOM capacitor structure includes a lower interconnect layer of the interconnect stack. The CBC structure also includes a second upper interconnect layer of the interconnect stack coupled to the MOM capacitor structure. The CBC structure also includes a metal insulator metal (MIM) capacitor layer between the first upper interconnect layer and the second upper interconnect layer. In addition, CBC structure also includes a MIM capacitor structure coupled to the MOM capacitor structure. The MIM capacitor structure includes a first capacitor plate having a portion of the first upper interconnect layer, and a second capacitor plate having a portion of the MIM capacitor layer(s).
Abstract translation: 互补的后端(BEOL)电容器(CBC)结构包括金属氧化物金属(MOM)电容器结构。 MOM电容器结构耦合到集成电路(IC)器件的互连堆叠的第一上互连层。 MOM电容器结构包括互连叠层的下互连层。 CBC结构还包括耦合到MOM电容器结构的互连叠层的第二上互连层。 CBC结构还包括在第一上部互连层和第二上部互连层之间的金属绝缘体金属(MIM)电容器层。 此外,CBC结构还包括耦合到MOM电容器结构的MIM电容器结构。 MIM电容器结构包括具有第一上部互连层的一部分的第一电容器板和具有MIM电容器层的一部分的第二电容器板。
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