公开(公告)号：US10862461B1

公开(公告)日：2020-12-08

申请号：US16431943

申请日：2019-06-05

Applicant: QUALCOMM Incorporated

Inventor： Tonmoy Biswas ,  Sreenivasa Mallia ,  Krishnaswamy Thiagarajan ,  Ashok Swaminathan ,  Vinod Panikkath

IPC: G06F1/04 ,  H03K3/00 ,  H03K3/037 ,  H03K5/13 ,  H04B1/40 ,  H03K5/00 ,  H03K19/20

Abstract: Certain aspects of the present disclosure are directed to a circuit for switch control. The circuit generally includes a plurality of flip-flops, each of the plurality of flip-flops having an input coupled to a respective one of a plurality of enable signals, a NOR gate having inputs coupled to outputs of the plurality of flip-flops; a plurality of AND gates, each having an input coupled to a respective one of the plurality of enable signals and having another input coupled to an output of the NOR gate, and a delay element coupled between the output of the NOR gate and reset inputs of the plurality of flip-flops.

公开(公告)号：US11736071B2

公开(公告)日：2023-08-22

申请号：US17208864

申请日：2021-03-22

Applicant: QUALCOMM Incorporated

Inventor： Ayush Mittal ,  Sreenivasa Mallia ,  Arpit Gupta ,  Krishnaswamy Thiagarajan ,  Bhushan Shanti Asuri

IPC: H03F1/22 ,  H03F1/42 ,  H03F3/24

CPC classification number: H03F1/42 ,  H03F3/245 ,  H03F2200/09 ,  H03F2200/36 ,  H03F2200/451

Abstract: Certain aspects of the present disclosure provide an amplifier. The amplifier generally includes an amplifier core circuit configured to amplify a radio frequency signal and having a first output and a second output; a transformer coupled to the amplifier core circuit, the transformer having a primary winding and a secondary winding, the primary winding being coupled to the first output and the second output of the amplifier core circuit, the secondary winding being coupled to an output node of the amplifier; and a variable resistance circuit coupled in parallel with the primary winding.

公开(公告)号：US10164637B2

公开(公告)日：2018-12-25

申请号：US15441750

申请日：2017-02-24

Applicant: QUALCOMM Incorporated

Inventor： Sreenivasa Mallia ,  Ayush Mittal ,  Krishnaswamy Thiagarajan ,  Karthikeya Aruppukottai Boominathan

IPC: H03K19/0185

Abstract: A device and method for shifting voltage levels within a circuit are provided. An aspect of the disclosure provides a level shifting circuit for shifting a first logic domain to a second logic domain. In particular, the level shifting circuit can receive an input signal having a first logic domain with a first high voltage and a first low voltage. The level shifting circuit can receive inputs corresponding to a second high voltage and a second low voltage from the second logic domain. The level shifting circuit can concurrently switch the first high voltage and first low voltage at the input to the second high voltage and the second low voltage to produce a level-shifted version of the input signal at the output. The level shifting circuit can also have a plurality of guard transistors that prevent overvoltage of the circuit components.