公开(公告)号：US20150200667A1

公开(公告)日：2015-07-16

申请号：US14155734

申请日：2014-01-15

Applicant: QUALCOMM Incorporated

Inventor： Shiva Ram Chandrasekaran ,  Chandrasekhar Reddy Singasani ,  Joey Dacanay ,  Mamta Bansal ,  Arman Ohanian ,  Satish Raj ,  Kiran Srinivasa Sastry ,  Abhirami Senthilkumaran ,  Tarek Zghal ,  Parissa Najdesamii ,  Sunil Kumar

IPC: H03K19/00 ,  G06F1/32

CPC classification number: H03K19/0008 ,  G06F1/3287 ,  Y02D10/171 ,  Y02D50/20

Abstract: Provided are systems and methods for reducing power consumption in the interface and routing circuitry associated with various core modules of an integrated circuit or system. One system includes core modules, glue logic domains adapted to interface the plurality of core modules, and a power controller electrically coupled to the glue logic domains. Each glue logic domain includes a glue logic module implemented as a soft macro with metal traces extending beyond an extent of the glue logic module. The power controller decouples power from selected glue logic domains based on control signals and/or detected power down states of core modules and/or other glue logic domains. The power controller facilitates the power transitions using logic state retention, logic state clamping, ordered or scheduled transitioning, and/or other power transition systems and methods.

Abstract translation: 提供了用于降低与集成电路或系统的各种核心模块相关联的接口和路由电路中的功耗的系统和方法。 一个系统包括核心模块，适于接合多个核心模块的胶合逻辑域，以及电连接到胶合逻辑域的功率控制器。 每个胶合逻辑域包括实现为具有超出胶合逻辑模块的范围的金属迹线的软宏的胶合逻辑模块。 功率控制器基于核心模块和/或其他胶合逻辑域的控制信号和/或检测到的掉电状态来将电力与选定的胶合逻辑域分离。 功率控制器使用逻辑状态保持，逻辑状态钳位，有序或调度转换和/或其他功率转换系统和方法来促进功率转换。

公开(公告)号：US11139830B2

公开(公告)日：2021-10-05

申请号：US16774472

申请日：2020-01-28

Applicant: QUALCOMM Incorporated

Inventor： Fernand Da Fonseca ,  Tarek Zghal ,  Richard Gerard Hofmann

IPC: H03M13/09 ,  G06F13/20 ,  H03M13/29

Abstract: In certain aspects, a method for sending data over a bus comprises: calculating a parity check code for a new data code, wherein the new data code comprises a number of bits in the new data code; calculating a Hamming distance between the new data code and a prior data code; and if the Hamming distance is greater than half of the number of bits in the new data code: inverting the new data code and the parity check code to obtain an inverted new data code and an inverted parity check code; and sending the inverted new data code and the inverted parity check code to the bus.