公开(公告)号：US20220019548A1

公开(公告)日：2022-01-20

申请号：US16931826

申请日：2020-07-17

Applicant: QUALCOMM Incorporated

Inventor： Sharon Graif ,  Amit Gil ,  Navdeep Mer ,  Viney Kumar

IPC: G06F13/362 ,  G06F13/24 ,  G06F13/40 ,  G06F9/54

Abstract: Nested commands for a radio frequency front end (RFFE) bus are provided. In particular, timing commands may be nested inside a normal data flow. On receipt of a nested timing command, a slave on the RFFE bus suspends or halts an active command and addresses the timing command. On completion of the timing command, the slave returns to the halted command. By allowing such nested commands, counters in the slave that would otherwise be used to track triggers may be eliminated or reduced and power may be conserved by placing a clock signal associated with the bus into a low power mode.

公开(公告)号：US11354266B2

公开(公告)日：2022-06-07

申请号：US16997542

申请日：2020-08-19

Applicant: QUALCOMM Incorporated

Inventor： Sharon Graif ,  Kishalay Haldar ,  Navdeep Mer ,  Viney Kumar ,  Sriharsha Chakka

IPC: G06F13/42 ,  G06F13/40 ,  G06F13/374

Abstract: The systems and methods for hang correction in a power management interface bus cause secondary master devices associated with the power management interface bus to utilize timers to determine if a master that won arbitration has asserted a clock signal within a predefined amount of time. If a timer for a secondary master device expires without a clock signal being asserted by the winning master, the secondary master will assume ownership of the bus and assert a clock signal. Priorities between secondary masters are created by using a master identification (MID) value assigned during bus enumeration to determine a timer value. By allowing the secondary masters to assume ownership after expiration of respective timers, bus ownership is maintained in the event that a winning master hangs and does not assert ownership.

公开(公告)号：US20220058154A1

公开(公告)日：2022-02-24

申请号：US16997542

申请日：2020-08-19

Applicant: QUALCOMM Incorporated

Inventor： Sharon Graif ,  Kishalay Haldar ,  Navdeep Mer ,  Viney Kumar ,  Sriharsha Chakka

IPC: G06F13/42 ,  G06F13/40 ,  G06F13/374

Abstract: The systems and methods for hang correction in a power management interface bus cause secondary master devices associated with the power management interface bus to utilize timers to determine if a master that won arbitration has asserted a clock signal within a predefined amount of time. If a timer for a secondary master device expires without a clock signal being asserted by the winning master, the secondary master will assume ownership of the bus and assert a clock signal. Priorities between secondary masters are created by using a master identification (MID) value assigned during bus enumeration to determine a timer value. By allowing the secondary masters to assume ownership after expiration of respective timers, bus ownership is maintained in the event that a winning master hangs and does not assert ownership.