公开(公告)号：US20120097923A1

公开(公告)日：2012-04-26

申请号：US13140141

申请日：2011-02-24

申请人： Qingqing Liang ,  Zhi Jin ,  Wenwu Wang ,  Huicai Zhong ,  Xinyu Liu ,  Huilong Zhu

发明人： Qingqing Liang ,  Zhi Jin ,  Wenwu Wang ,  Huicai Zhong ,  Xinyu Liu ,  Huilong Zhu

IPC分类号： H01L29/786 ,  H01L29/165 ,  H01L21/336 ,  B82Y40/00 ,  B82Y99/00

CPC分类号： H01L29/778 ,  H01L29/1606 ,  H01L29/78603 ,  H01L29/78618 ,  H01L29/78684

摘要： The invention provides a graphene device structure and a method for manufacturing the same, the device structure comprising a graphene layer; a gate region in contact with the graphene layer; semiconductor doped regions formed in the two opposite sides of the gate region and in contact with the graphene layer, wherein the semiconductor doped regions are isolated from the gate region; a contact formed on the gate region and contacts formed on the semiconductor doped regions. The on-off ratio of the graphene device is increased through the semiconductor doped regions without increasing the band gap of the graphene material, i.e., without affecting the mobility of the material or the speed of the device, thereby increasing the applicability of the graphene material in CMOS devices.

摘要翻译： 本发明提供了一种石墨烯器件结构及其制造方法，该器件结构包括石墨烯层; 与石墨烯层接触的栅极区域; 半导体掺杂区域形成在栅极区域的两个相对侧并与石墨烯层接触，其中半导体掺杂区域与栅极区域隔离; 在栅极区域上形成的触点和形成在半导体掺杂区域上的触点。 通过半导体掺杂区域增加石墨烯器件的开关比，而不增加石墨烯材料的带隙，即不影响材料的迁移率或器件的速度，从而增加石墨烯材料的适用性 在CMOS设备中。

公开(公告)号：US20120181509A1

公开(公告)日：2012-07-19

申请号：US13143932

申请日：2011-02-23

申请人： Qingqing Liang ,  Zhi Jin ,  Wenwu Wang ,  Huicai Zhong ,  Huilong Zhu

发明人： Qingqing Liang ,  Zhi Jin ,  Wenwu Wang ,  Huicai Zhong ,  Huilong Zhu

IPC分类号： H01L29/775 ,  H01L21/335

CPC分类号： H01L29/66045 ,  H01L29/1606 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78684

摘要： A graphene device structure and a method for manufacturing the same are provided. The graphene device structure comprises: a graphene layer; a gate region formed on the graphene layer; and a doped semiconductor region formed at one side of the gate region and connected with the graphene layer, wherein the doped semiconductor region is a drain region of the graphene device structure, and the graphene layer formed at one side of the gate region is a source region of the graphene device structure. The on/off ratio of the graphene device structure may be improved by the doped semiconductor region without increasing the band gaps of the graphene material, so that the applicability of the graphene material in CMOS devices may be enhanced without decreasing the carrier mobility of graphene materials and speed of the devices.

摘要翻译： 提供石墨烯器件结构及其制造方法。 石墨烯器件结构包括：石墨烯层; 形成在所述石墨烯层上的栅极区域; 以及形成在所述栅极区域的一侧并与所述石墨烯层连接的掺杂半导体区域，其中所述掺杂半导体区域是所述石墨烯器件结构的漏极区域，并且形成在所述栅极区域一侧的所述石墨烯层是源极 石墨烯器件结构的区域。 可以通过掺杂半导体区域改善石墨烯器件结构的开/关比，而不增加石墨烯材料的带隙，从而可以增强石墨烯材料在CMOS器件中的适用性，而不降低石墨烯材料的载流子迁移率 和设备的速度。

公开(公告)号：US08703558B2

公开(公告)日：2014-04-22

申请号：US13140141

申请日：2011-02-24

申请人： Qingqing Liang ,  Zhi Jin ,  Wenwu Wang ,  Huicai Zhong ,  Xinyu Liu ,  Huilong Zhu

发明人： Qingqing Liang ,  Zhi Jin ,  Wenwu Wang ,  Huicai Zhong ,  Xinyu Liu ,  Huilong Zhu

IPC分类号： H01L21/00

CPC分类号： H01L29/778 ,  H01L29/1606 ,  H01L29/78603 ,  H01L29/78618 ,  H01L29/78684

摘要： The invention provides a graphene device structure and a method for manufacturing the same, the device structure comprising a graphene layer; a gate region in contact with the graphene layer; semiconductor doped regions formed in the two opposite sides of the gate region and in contact with the graphene layer, wherein the semiconductor doped regions are isolated from the gate region; a contact formed on the gate region and contacts formed on the semiconductor doped regions. The on-off ratio of the graphene device is increased through the semiconductor doped regions without increasing the band gap of the graphene material, i.e., without affecting the mobility of the material or the speed of the device, thereby increasing the applicability of the graphene material in CMOS devices.

摘要翻译： 本发明提供了一种石墨烯器件结构及其制造方法，该器件结构包括石墨烯层; 与石墨烯层接触的栅极区域; 半导体掺杂区域形成在栅极区域的两个相对侧并与石墨烯层接触，其中半导体掺杂区域与栅极区域隔离; 在栅极区域上形成的触点和形成在半导体掺杂区域上的触点。 通过半导体掺杂区域增加石墨烯器件的开关比，而不增加石墨烯材料的带隙，即不影响材料的迁移率或器件的速度，从而增加石墨烯材料的适用性 在CMOS设备中。

公开(公告)号：US20130221329A1

公开(公告)日：2013-08-29

申请号：US13582431

申请日：2012-03-29

申请人： Qingqing Liang ,  Huicai Zhong ,  Huilong Zhu ,  Zhi Jin ,  Xinyu Liu ,  Tianchun Ye

发明人： Qingqing Liang ,  Huicai Zhong ,  Huilong Zhu ,  Zhi Jin ,  Xinyu Liu ,  Tianchun Ye

IPC分类号： H01L29/66

CPC分类号： H01L29/66977 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/1606 ,  H01L29/778

摘要： An embodiment of the invention discloses a graphene device comprising a plurality of graphene channels and a gate, wherein one end of all the graphene channels is connected to one terminal, all the graphene channels are in contact with and electrically connected with the gate, and the angles between the graphene channels and the gate are mutually different. Due to a different incident wave angle for a different graphene channel, each of the graphene channels has a different tunneling probability, each of the graphene channels has a different conduction condition, and the graphene device may be used as a device such as a multiplexer or a demultiplexer, etc.

摘要翻译： 本发明的实施例公开了一种石墨烯装置，其包括多个石墨烯通道和一个浇口，其中所有石墨烯通道的一端连接到一个端子，所有的石墨烯通道与浇口接触并与门电连接， 石墨烯通道和栅极之间的角度是相互不同的。 由于不同石墨烯通道的不同的入射波角，每个石墨烯通道具有不同的隧道概率，每个石墨烯通道具有不同的导电条件，并且石墨烯装置可以用作诸如多路复用器或 解复用器等