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公开(公告)号：US09553693B2
公开(公告)日：2017-01-24
申请号：US14751193
申请日：2015-06-26
Applicant: Raytheon Company
Inventor： Jeffery J. Logan , Harry Marr , Tyler Miller
Abstract: Methods and apparatus to determine a level of inherent jitter for signals from a transmitter and a receiver, and modulate information onto a signal transmitted by the transmitter by using spot jitter (with bandwidth and center frequency modulation) and/or pulse width jitter in a region outside of a data region with inherent jitter to carry communication between systems.
Abstract translation: 确定来自发射机和接收机的信号的固有抖动水平的方法和装置，以及通过使用区域中的斑点抖动（带宽和中心频率调制）和/或脉冲宽度抖动来将信息调制到由发射机发射的信号上 在具有固有抖动的数据区域外部进行系统之间的通信。
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公开(公告)号：US20160380717A1
公开(公告)日：2016-12-29
申请号：US14751193
申请日：2015-06-26
Applicant: Raytheon Company
Inventor： Jeffery J. Logan , Harry Marr , Tyler Miller
Abstract: Methods and apparatus to determine a level of inherent jitter for signals from a transmitter and a receiver, and modulate information onto a signal transmitted by the transmitter by using spot jitter (with bandwidth and center frequency modulation) and/or pulse width jitter in a region outside of a data region with inherent jitter to carry communication between systems.
Abstract translation: 确定来自发射机和接收机的信号的固有抖动水平的方法和装置，以及通过使用区域中的斑点抖动（带宽和中心频率调制）和/或脉冲宽度抖动来将信息调制到由发射机发射的信号上 在具有固有抖动的数据区域外部进行系统之间的通信。
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公开(公告)号：US09281820B2
公开(公告)日：2016-03-08
申请号：US13782546
申请日：2013-03-01
Applicant: Raytheon Company
Inventor： Harry Marr , Kenneth E. Prager , Julia Karl , Lloyd J. Lewins
IPC: G06F7/57 , H03K19/096
CPC classification number: H03K19/096 , G06F7/57 , G06F9/3871
Abstract: An asynchronous pipeline structure includes a plurality of functional blocks comprising dynamic logic, each block precharged to an idle state responsive to a precharge control signal applied thereto, with each block, upon being precharged, receiving input data thereto for processing, and holding output data generated thereby during an evaluate phase, independent of a reset of the input data; for each block, a completion detector circuit coupled to the output of the functional block, the completion detector circuit generating an acknowledgement signal that indicates validity or absence of data at the output of the block; and for each block, a precharge control circuit generating a precharge signal, wherein for a given block, a first input to the precharge control circuit comprises the acknowledgment signal from a downstream completion detector, and second input to the precharge control circuit comprises the precharge signal from an upstream precharge control circuit.
Abstract translation: 异步流水线结构包括多个功能块，其包括动态逻辑，每个块响应于施加到其上的预充电控制信号预充电到空闲状态，每个块在预充电时接收输入数据以进行处理，并保持生成的输出数据 从而在评估阶段期间，独立于输入数据的复位; 对于每个块，完成检测器电路耦合到功能块的输出，完成检测器电路产生指示块的输出处数据有效或不存在的确认信号; 并且对于每个块，产生预充电信号的预充电控制电路，其中对于给定块，对于预充电控制电路的第一输入包括来自下游完成检测器的确认信号，并且到预充电控制电路的第二输入包括预充电信号 来自上游预充电控制电路。
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公开(公告)号：US20170257136A1
公开(公告)日：2017-09-07
申请号：US15062025
申请日：2016-03-04
Applicant: RAYTHEON COMPANY
Inventor： John P Gianvittorio , Denpol Kultran , Harry Marr
Abstract: A reconfigurable discrete time analog signal processor includes a finite impulse response (FIR) filter configured to receive a portion of an RF transmit signal, to receive FIR coefficients, and to generate a leakage cancellation signal based on the portion of the RF transmit signal and the FIR coefficients, the FIR filter including sample and hold (SH) circuits configured to receive the portion of the RF transmit signal, to sample the portion of the RF transmit signal at successive sample times according to a sample clock, and to generate sampled analog voltage signals, and analog multipliers coupled to the SH circuits and configured to multiply the sampled analog voltage signals by binary multiplication factors to generate the leakage cancellation signal.
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5.发明申请公开(公告)号：US20160380654A1
公开(公告)日：2016-12-29
申请号：US14750101
申请日：2015-06-25
Applicant: Raytheon Company
Inventor： Jeffery J. Logan , Harry Marr , Tyler Miller
CPC classification number: H04K3/42 , H03K7/08 , H04K3/28 , H04K2203/32 , H04L43/087
Abstract: Methods and apparatus to determine a level of inherent jitter for signals from a transmitter and a receiver, and modulate information onto a signal transmitted by the transmitter by using spot jitter (with bandwidth and center frequency modulation) and/or pulse width jitter in a region outside of a data region with inherent jitter to carry communication between systems.
Abstract translation: 确定来自发射机和接收机的信号的固有抖动水平的方法和装置，以及通过使用区域中的斑点抖动（带宽和中心频率调制）和/或脉冲宽度抖动来将信息调制到由发射机发射的信号上 在具有固有抖动的数据区域外部进行系统之间的通信。
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Patent Agency Ranking
公开(公告)号：US20160218733A1
公开(公告)日：2016-07-28
申请号：US14606391
申请日：2015-01-27
Applicant: RAYTHEON COMPANY
Inventor： Daniel Thompson , Harry Marr , Francisco Romero
IPC: H03M1/12
CPC classification number: H04J13/0003 , H04B7/086 , H04J13/004 , H04J13/12 , H04J13/18
Abstract: A system for converting several analog signals to digital signals using a single analog to digital converter. Each of the analog signals is encoded, using multiplication, with a different binary code, and the encoded analog signals are summed, and converted to digital form by an analog to digital converter. Multiple digital data streams are then formed from the digital output stream produced by the analog to digital converter, by forming correlations of the digital output stream with each of the binary codes.
Abstract translation: 用于使用单个模数转换器将几个模拟信号转换为数字信号的系统。 每个模拟信号使用乘法与不同的二进制码进行编码，并将编码的模拟信号相加，并由模数转换器转换为数字形式。 然后通过形成数字输出流与每个二进制码的相关性，由模数转换器产生的数字输出流形成多个数字数据流。
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公开(公告)号：US10200075B2
公开(公告)日：2019-02-05
申请号：US15062025
申请日：2016-03-04
Applicant: RAYTHEON COMPANY
Inventor： John P Gianvittorio , Denpol Kultran , Harry Marr
Abstract: A reconfigurable discrete time analog signal processor includes a finite impulse response (FIR) filter configured to receive a portion of an RF transmit signal, to receive FIR coefficients, and to generate a leakage cancellation signal based on the portion of the RF transmit signal and the FIR coefficients, the FIR filter including sample and hold (SH) circuits configured to receive the portion of the RF transmit signal, to sample the portion of the RF transmit signal at successive sample times according to a sample clock, and to generate sampled analog voltage signals, and analog multipliers coupled to the SH circuits and configured to multiply the sampled analog voltage signals by binary multiplication factors to generate the leakage cancellation signal.
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公开(公告)号：US09887799B2
公开(公告)日：2018-02-06
申请号：US14750101
申请日：2015-06-25
Applicant: Raytheon Company
Inventor： Jeffery J. Logan , Harry Marr , Tyler Miller
CPC classification number: H04K3/42 , H03K7/08 , H04K3/28 , H04K2203/32 , H04L43/087
Abstract: Methods and apparatus to determine a level of inherent jitter for signals from a transmitter and a receiver, and modulate information onto a signal transmitted by the transmitter by using spot jitter (with bandwidth and center frequency modulation) and/or pulse width jitter in a region outside of a data region with inherent jitter to carry communication between systems.
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公开(公告)号：US09391631B1
公开(公告)日：2016-07-12
申请号：US14606391
申请日：2015-01-27
Applicant: RAYTHEON COMPANY
Inventor： Daniel Thompson , Harry Marr , Francisco Romero
IPC: H03M1/12
CPC classification number: H04J13/0003 , H04B7/086 , H04J13/004 , H04J13/12 , H04J13/18
Abstract: A system for converting several analog signals to digital signals using a single analog to digital converter. Each of the analog signals is encoded, using multiplication, with a different binary code, and the encoded analog signals are summed, and converted to digital form by an analog to digital converter. Multiple digital data streams are then formed from the digital output stream produced by the analog to digital converter, by forming correlations of the digital output stream with each of the binary codes.
Abstract translation: 用于使用单个模数转换器将几个模拟信号转换为数字信号的系统。 每个模拟信号使用乘法与不同的二进制码进行编码，并将编码的模拟信号相加，并由模数转换器转换为数字形式。 然后通过形成数字输出流与每个二进制码的相关性，由模数转换器产生的数字输出流形成多个数字数据流。
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10.发明授权Apparatus and method for efficient waveform portability between different platforms 有权不同平台之间有效的波形可移植性的装置和方法公开(公告)号：US09385798B1
公开(公告)日：2016-07-05
申请号：US14606701
申请日：2015-01-27
Applicant: RAYTHEON COMPANY
Inventor： Harry Marr , Ian S. Robinson , Ray T. Hsu
IPC: H04L27/00 , H04B7/06 , H03K19/177
CPC classification number: H04B7/0613 , G06F1/0342 , H03K19/17708 , H04K3/42 , H04K3/44
Abstract: Method and apparatus for generating channelized hardware-independent waveforms include: generating metadata associated with a waveform, the metadata including a frequency list, a phase list and amplitude information, wherein the metadata is generated independent of a number of channels; interpreting the metadata to generate channel select, frequency, phase and amplitude parameters; providing the frequency, phase and amplitude parameters to a direct digital synthesizer (DDS) to generate a digital signal; providing the channel select parameter to a channel selector to generate a plurality of channelized waveforms from the generated digital signal; and transmitting the plurality of channelized waveforms over a plurality of communication channels.
Abstract translation: 用于产生信道化与硬件无关的波形的方法和装置包括：生成与波形相关联的元数据，所述元数据包括频率列表，相位列表和幅度信息，其中独立于多个信道生成所述元数据; 解释元数据以产生通道选择，频率，相位和幅度参数; 将频率，相位和幅度参数提供给直接数字合成器（DDS）以产生数字信号; 向频道选择器提供频道选择参数以从所生成的数字信号中产生多个信道化波形; 以及在多个通信信道上发送多个信道化波形。
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