SEMICONDUCTOR MEMORY DEVICE THAT CAN STABLY PERFORM WRITING AND READING WITHOUT INCREASING CURRENT CONSUMPTION EVEN WITH A LOW POWER SUPPLY VOLTAGE
    1.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE THAT CAN STABLY PERFORM WRITING AND READING WITHOUT INCREASING CURRENT CONSUMPTION EVEN WITH A LOW POWER SUPPLY VOLTAGE 有权
    半导体存储器件,即使在低功耗电压下也能稳定地执行写入和读取,而不会增加电流消耗

    公开(公告)号:US20140126278A1

    公开(公告)日:2014-05-08

    申请号:US14151581

    申请日:2014-01-09

    CPC classification number: G11C11/419 G11C5/063 G11C11/412

    Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.

    Abstract translation: 单元电源线被布置用于存储单元列,并且分别根据相应列中的位线的电压电平来调整单元电源线的阻抗或电压电平。 在数据写入操作中,根据所选列的位线电位将单元电源线强制为浮置状态,并且电压电平改变,并且减小所选存储单元的锁存能力以快速写入数据。 即使使用低电源电压,也可以实现能够稳定地执行数据的写入和读取的静态半导体存储器件。

    SEMICONDUCTOR MEMORY DEVICE THAT CAN STABLY PERFORM WRITING AND READING WITHOUT INCREASING CURRENT CONSUMPTION EVEN WITH A LOW POWER SUPPLY VOLTAGE
    4.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE THAT CAN STABLY PERFORM WRITING AND READING WITHOUT INCREASING CURRENT CONSUMPTION EVEN WITH A LOW POWER SUPPLY VOLTAGE 有权
    半导体存储器件,即使在低功耗电压下也能稳定地执行写入和读取,而不会增加电流消耗

    公开(公告)号:US20170011794A1

    公开(公告)日:2017-01-12

    申请号:US15274852

    申请日:2016-09-23

    CPC classification number: G11C11/419 G11C5/063 G11C11/412

    Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.

    Abstract translation: 单元电源线被布置用于存储单元列,并且分别根据相应列中的位线的电压电平来调整单元电源线的阻抗或电压电平。 在数据写入操作中,根据所选列的位线电位将单元电源线强制为浮置状态,并且电压电平改变,并且减小所选存储单元的锁存能力以快速写入数据。 即使使用低电源电压,也可以实现能够稳定地执行数据的写入和读取的静态半导体存储器件。

    SEMICONDUCTOR MEMORY DEVICE THAT CAN STABLY PERFORM WRITING AND READING WITHOUT INCREASING CURRENT CONSUMPTION EVEN WITH A LOW POWER SUPPLY VOLTAGE
    5.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE THAT CAN STABLY PERFORM WRITING AND READING WITHOUT INCREASING CURRENT CONSUMPTION EVEN WITH A LOW POWER SUPPLY VOLTAGE 有权
    半导体存储器件,即使在低功耗电压下也能稳定地执行写入和读取,而不会增加电流消耗

    公开(公告)号:US20160078925A1

    公开(公告)日:2016-03-17

    申请号:US14942822

    申请日:2015-11-16

    CPC classification number: G11C11/419 G11C5/063 G11C11/412

    Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented.

    Abstract translation: 单元电源线被布置用于存储单元列,并且分别根据相应列中的位线的电压电平来调整单元电源线的阻抗或电压电平。 在数据写入操作中,根据所选列的位线电位将单元电源线强制为浮置状态,并且电压电平改变,并且减小所选存储单元的锁存能力以快速写入数据。 即使使用低电源电压,也可以实现能够稳定地执行数据的写入和读取的静态半导体存储器件。

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