公开(公告)号：US20170160792A1

公开(公告)日：2017-06-08

申请号：US15439175

申请日：2017-02-22

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshinori TOKIOKA ,  Soichi KOBAYASHI ,  Akira OIZUMI

IPC: G06F1/32 ,  G06F1/24

CPC classification number: G06F1/3296 ,  G06F1/24 ,  G06F1/26 ,  G06F1/3203 ,  G06F1/3234 ,  H03K17/223 ,  H03L5/00 ,  Y02D10/172 ,  Y02D50/20

Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.

公开(公告)号：US20180196500A1

公开(公告)日：2018-07-12

申请号：US15915788

申请日：2018-03-08

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshinori TOKIOKA ,  Soichi KOBAYASHI ,  Akira OIZUMI

IPC: G06F1/32 ,  G06F1/24

CPC classification number: G06F1/3296 ,  G06F1/24 ,  G06F1/26 ,  G06F1/3203 ,  G06F1/3234 ,  H03K17/223 ,  H03L5/00 ,  Y02D10/172 ,  Y02D50/20

Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.

公开(公告)号：US20150378426A1

公开(公告)日：2015-12-31

申请号：US14845060

申请日：2015-09-03

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshinori TOKIOKA ,  Soichi KOBAYASHI ,  Akira OIZUMI

IPC: G06F1/32 ,  G06F1/24

CPC classification number: G06F1/3296 ,  G06F1/24 ,  G06F1/26 ,  G06F1/3203 ,  G06F1/3234 ,  H03K17/223 ,  H03L5/00 ,  Y02D10/172 ,  Y02D50/20

Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.

Abstract translation: 提供一种能够减少上电时的浪费待机时间的半导体装置。 在该半导体器件中，内部电路的复位被消除，如下所述。 当存储在存储部分中的数据信号为“0”时，当在上电复位信号的上升沿之后经过相当短的时间时，通过使内部复位信号变为“H”电平来解除复位。 当数据信号为“1”时，在上电复位信号的上升沿过去相对较长的时间后，通过将内部复位信号置“H”电平来解除复位。 因此，通过将逻辑上等同于电源电压的上升时间的数据信号写入存储部分，可以减少上电浪费的待机时间。