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公开(公告)号:US20160142011A1
公开(公告)日:2016-05-19
申请号:US14943836
申请日:2015-11-17
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Toshiaki TSUTSUMI , Yoshihiro FUNATO , Tomonori OKUDAIRA , Tadato YAMAGATA , Akihisa UCHIDA , Takeshi TERASAKI , Tomohisa SUZUKI , Yoshiharu KANEGAE
CPC classification number: H03B5/24 , H01L23/3107 , H01L23/5228 , H01L24/05 , H01L24/06 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L27/0629 , H01L28/20 , H01L28/24 , H01L2224/05554 , H01L2224/06179 , H01L2224/32245 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2924/01015 , H01L2924/07802 , H01L2924/14 , H01L2924/181 , H03L7/24 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
Abstract: A semiconductor device is formed by sealing, with a resin, a semiconductor chip (CP1) having an oscillation circuit utilizing a reference resistor. The oscillation circuit generates a reference current by utilizing the reference resistor, a voltage is generated in accordance with this reference current and an oscillation frequency of the oscillation unit, and the oscillation unit oscillates at a frequency in accordance with the generated voltage. The reference resistor is formed of a plurality of resistors, which extend in a first (Y) direction orthogonal to a first side, inside a first region (RG1, RG2, RG3, and RG4) surrounded by the first side (S1, S2, S3, and S4) of a main surface of the semiconductor chip (CP1), a first line (42, 43, 44, and 45) connecting between one end of the first side and the center (CT1) of the main surface of the semiconductor chip, and a second line (42, 43, 44, and 45) connecting between the other end of the first side and the center of the main surface of the semiconductor chip.