公开(公告)号：US20180300106A1

公开(公告)日：2018-10-18

申请号：US16007805

申请日：2018-06-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Masato HIRAI ,  Yuki HIGUCHI ,  Takeshi KUWANO ,  Kosuke FUWA

IPC: G06F7/50 ,  G06F7/523 ,  G06F3/046 ,  G06F3/041 ,  G06F3/0354 ,  G06F1/32

CPC classification number: G06F7/50 ,  G06F1/3203 ,  G06F3/03545 ,  G06F3/0416 ,  G06F3/046 ,  G06F7/523

Abstract: The speed of pen position detection is improved without increasing the circuit area and the current consumption.A sampling circuit samples a signal and outputs sampling data. A arithmetic circuit calculates a real part and an imaginary part of the sampling data. The arithmetic circuit classifies the real part of the sampling data into one of a plurality of groups and classifies the imaginary part of the sampling data into one of the groups according to an order of output of the sampling data from the sampling circuit. Then, the arithmetic circuit adds together real parts of sampling data belonging to a group and adds together imaginary parts of sampling data belonging to a group for each of the groups, and calculates amplitude and phase of the signal by using an addition result of the real parts and an addition result of the imaginary parts of each of the groups.

公开(公告)号：US20170199725A1

公开(公告)日：2017-07-13

申请号：US15402671

申请日：2017-01-10

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Masato HIRAI ,  Yuki HIGUCHI ,  Takeshi KUWANO ,  Kosuke FUWA

IPC: G06F7/50 ,  G06F7/523

CPC classification number: G06F7/50 ,  G06F1/3203 ,  G06F3/03545 ,  G06F3/0416 ,  G06F3/046 ,  G06F7/523

Abstract: The speed of pen position detection is improved without increasing the circuit area and the current consumption. A sampling circuit samples a signal and outputs sampling data. A arithmetic circuit calculates a real part and an imaginary part of the sampling data. The arithmetic circuit classifies the real part of the sampling data into one of a plurality of groups and classifies the imaginary part of the sampling data into one of the groups according to an order of output of the sampling data from the sampling circuit. Then, the arithmetic circuit adds together real parts of sampling data belonging to a group and adds together imaginary parts of sampling data belonging to a group for each of the groups, and calculates amplitude and phase of the signal by using an addition result of the real parts and an addition result of the imaginary parts of each of the groups.

公开(公告)号：US20150117126A1

公开(公告)日：2015-04-30

申请号：US14593165

申请日：2015-01-09

Applicant: Renesas Electronics Corporation

Inventor： Yuki HIGUCHI

IPC: G11C7/22

CPC classification number: H03K5/04 ,  G11C7/22 ,  H03K7/08 ,  H03K2005/00293

Abstract: In order to reduce occurrence of a fetching error of a digital signal, caused by a power-source noise, there is provided a semiconductor device provided with a switching circuit for executing a switching operation according to a pulse control signal and a digital signal hold circuit for fetching a digital signal. The digital signal hold circuit includes a mask signal generation circuit for generating a mask signal from the pulse control signal, the mask signal being for use in keeping the digital signal from being fetched during a time period of power-source noise occurrence caused by the switching operation, and the digital signal is not fetched during the time period of power-source noise occurrence while the digital signal is fetched during a time period of power-source noise nonoccurrence.

Abstract translation: 为了减少由电源噪声引起的数字信号的提取误差的发生，提供了一种设置有用于根据脉冲控制信号和数字信号保持电路执行开关操作的开关电路的半导体器件 用于取数字信号。 数字信号保持电路包括一个屏蔽信号产生电路，用于从脉冲控制信号产生一个屏蔽信号，该屏蔽信号用于保持数字信号在由切换引起的电源噪声发生的时间周期内被取出 在电源噪声发生的时间段期间，在电源噪声不发生的时间段期间取出数字信号时，不会取出数字信号。