公开(公告)号：US11705285B2

公开(公告)日：2023-07-18

申请号：US17730153

申请日：2022-04-26

Applicant: ROHM CO., LTD.

Inventor： Keisuke Fukae

IPC: H01G4/33 ,  H01G4/30 ,  H01G4/252 ,  H01G4/012 ,  H01G4/008

CPC classification number: H01G4/33 ,  H01G4/012 ,  H01G4/252 ,  H01G4/306 ,  H01G4/008

Abstract: A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.

公开(公告)号：US12217913B2

公开(公告)日：2025-02-04

申请号：US17950592

申请日：2022-09-22

Applicant: ROHM CO., LTD.

Inventor： Keisuke Fukae

IPC: H01G4/232 ,  H01G4/008 ,  H01G4/224 ,  H01G4/30 ,  H01L49/02

Abstract: The present disclosure provides a chip part. The chip part includes a substrate, a capacitor portion and a substrate body portion. The capacitor portion includes a plurality of wall portions having a lengthwise direction and separated from each other by a trench formed on a first main surface of the substrate. The substrate body portion is formed around the capacitor portion using a portion of the substrate. The plurality of wall portions are formed of a plurality of pillar units. The capacitor portion, in the plan view, includes a first capacitor portion and a second capacitor portion. The first capacitor portion includes the plurality of wall portions having the lengthwise direction as a first lengthwise direction. The second capacitor portion includes the plurality of wall portions having the lengthwise direction as a second lengthwise direction orthogonal to the first lengthwise direction.

公开(公告)号：US11342125B2

公开(公告)日：2022-05-24

申请号：US16985016

申请日：2020-08-04

Applicant: ROHM CO., LTD.

Inventor： Keisuke Fukae

IPC: H01G4/33 ,  H01G4/30 ,  H01G4/252 ,  H01G4/012 ,  H01G4/008

Abstract: A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.

公开(公告)号：US12255226B2

公开(公告)日：2025-03-18

申请号：US17950523

申请日：2022-09-22

Applicant: ROHM CO., LTD.

Inventor： Keisuke Fukae

IPC: H01L27/06 ,  H01L23/522 ,  H01L29/06 ,  H01L29/866 ,  H01L49/02

Abstract: The present disclosure provides a chip part. The chip part includes: a substrate, a first external electrode and a second external electrode, a capacitor portion disposed on a first main surface of the substrate, a lower electrode including a drawer portion drawn out to the first main surface, a capacitive film disposed on the lower electrode, an upper electrode disposed on the capacitive film, a first electrode film electrically connecting the first external electrode to the lower electrode, and a second electrode film electrically connecting the second external electrode to the upper electrode. The drawer portion includes a first portion disposed in a region between the first external electrode and the second external electrode, and the first electrode film includes a first lower contact portion connected to the first portion.

公开(公告)号：US12218123B2

公开(公告)日：2025-02-04

申请号：US17948929

申请日：2022-09-20

Applicant: ROHM CO., LTD.

Inventor： Keisuke Fukae

IPC: H01L27/02 ,  H01L23/00 ,  H01L29/40 ,  H01L29/417 ,  H01L29/66 ,  H01L29/94

Abstract: The present disclosure provides a chip part. The chip part includes a substrate, a first external electrode, a second external electrode, a capacitor portion, a lower electrode, a capacitive film and an upper electrode. The first external electrode and the second external electrode are disposed on a first main surface of the substrate. The capacitor portion is disposed on the first main surface of the substrate. The lower electrode includes a first body portion and a first peripheral portion integrally drawn out around the capacitor portion from the first body portion. The capacitive film includes a second body portion disposed within the capacitor portion and a second peripheral portion integrally drawn out from the second body portion to the first peripheral portion. The upper electrode is disposed on the capacitive film.

公开(公告)号：US10200007B2

公开(公告)日：2019-02-05

申请号：US15212221

申请日：2016-07-16

Applicant: ROHM CO., LTD.

Inventor： Keisuke Fukae ,  Yasuhiro Kondo ,  Katsuya Matsuura ,  Hiroyuki Okada ,  Junya Yamagami

IPC: H03H7/06 ,  H03H1/02 ,  H03H1/00

Abstract: A filter chip includes a substrate, a plurality of external terminals formed on the substrate for external connection, and a plurality of passive element forming regions provided in the regions between the plurality of external terminals in plan view when viewed along a direction normal to the surface of the substrate, the plurality of passive element forming regions including at least a resistor forming region where a resistor is formed. The resistor forming region includes a resistive conductive film formed on the substrate with one end and the other end thereof electrically connected to different ones of the external terminals, and a fuse portion integrally formed with the resistive conductive film. The fuse portion is cuttably provided to electrically connect a part of the resistive conductive film to the external terminals, or to electrically separate a part of the resistive conductive film from the external terminals.